X1202
Figure 5. Set V
TRIP
Level Sequence (V
CC
= desired V
TRIP
value)
V
P
= 15V
V
CC
RESET
V
CC
0 1 2 3 4 5 6 7
SCL
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
SDA
AEh
00h
01h
00h
Resetting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a “native”
voltage level. For example, if the current V
TRIP
is 4.4V
and the new V
TRIP
must be 4.0V, then the V
TRIP
must
be reset. When V
TRIP
is reset, the new V
TRIP
is less
than 1.7V. This procedure must be used to set the volt-
age to a lower value.
Figure 6. Reset V
TRIP
Level Sequence (V
CC
> 3V)
RESET
V
CC
0 1 2 3 4 5 6 7
SCL
0 1 2 3 4 5 6 7
V
P
= 15V
To reset the new V
TRIP
voltage, apply more than 3V to
the V
CC
pin and tie the RESET pin to the programming
voltage V
P
. Then write 00h to address 03h. The stop bit of
a valid write operation initiates the V
TRIP
programming
sequence. Bring RESET to complete the operation.
Note:
This operation also writes 00h to address 03h of
the EEPROM array.
V
CC
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
SDA
AEh
00h
03h
00h
Figure 7. Sample V
TRIP
Reset Circuit
V
P
4.7K
RESET
1
8
Run
SCL
SDA
Adjust
µC
X1202
2
7
(8-Pin SOIC)
3
6
4
5
V
TRIP
Adj.
REV 1.1.8 5/17/01
www.xicor.com
Characteristics subject to change without notice.
8 of 23
XICOR [ XICOR INC. ]
