X1243 – Preliminary Information
the bits disables the output IRQ for that alarm condition,
but the alarm condition can still be checked by polling
the alarm flag.
Table 1. Clock/Control Memory Map
Addr.
Type
Reg
Name
Range
Factory
Settings
Bit
7
6
5
4
3
2
1
0
(optional)
The alarm enable bits are located in the MSB of the
particular register. When all enable bits are set to ‘0’,
there are no alarms.
003F
0037
0036
0035
0034
0033
0032
0031
0030
0011
0010
000F
000E
000D
000C
000B
000A
0009
0008
0007
0006
0005
0004
0003
0002
0001
0000
Status
SR
Y2K
DW
YR
MO
DT
HR
MN
SC
INT
BL
DWA1
YRA1
MOA1
DTA1
HRA1
MNA1
SCA1
DWA1
YRA0
MOA0
DTA0
HRA0
MNA0
SCA0
BAT
0
0
Y23
0
0
T24
0
0
IM
BP2
EDW1
EMO1
EDT1
EHR1
EMN1
ESC1
EDW0
EMO0
EDT0
EHR0
EMN0
ESC0
AL1
0
0
Y22
0
0
0
M22
S22
AL1E
BP1
0
0
0
0
A1M22
A1S22
0
0
0
0
A0M22
A0S22
AL0
Y2K21
0
Y21
0
D21
H21
M21
S21
AL0E
BP0
0
0
A1D21
A1H21
A1M21
A1S21
0
0
A0D21
A0H21
A0M21
A0S21
0
Y2K20
0
Y20
G20
D20
H20
M20
S20
0
0
0
A1G20
A1D20
A1H20
A1M20
A1S20
0
A0G20
A0D20
A0H20
A0M20
A0S20
0
Y2K13
0
Y13
G13
D13
H13
M13
S13
0
0
unused
0
A1G13
A1D13
A1H13
A1M13
A1S13
unused
0
A0G13
A0D13
A0H13
A0M13
A0S13
RWEL
0
DY2
Y12
G12
D12
H12
M12
S12
0
0
DY2
A1G12
A1D12
A1H12
A1M12
A1S12
DY2
A0G12
A0D12
A0H12
A0M12
A0S12
WEL
0
DY1
Y11
G11
D11
H11
M11
S11
0
0
DY1
A1G11
A1D11
A1H11
A1M11
A1S11
DY1
A0G11
A0D11
A0H11
A0M11
A0S11
RTCF
Y2K10
DY0
Y10
G10
D10
H10
M10
S10
0
0
DY0
A1G10
A1D10
A1H10
A1M10
A1S10
DY0
A0G10
A0D10
A0H10
A0M10
A0S10
0-6
1-12
1-31
0-23
0-59
0-59
0-6
1-12
1-31
0-23
0-59
0-59
19/20
0-6
0-99
1-12
1-31
0-23
0-59
0-59
01h
20h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
RTC
(SRAM)
Control
(EEPROM)
Unused - Default = RTC Year value
Alarm1
(EEPROM)
Unused - Default = RTC Year value
Alarm0
(EEPROM)
REAL TIME CLOCK REGISTERS
Year 2000 (Y2K)
The X1243 has a century byte that “rolls over” from 19
to 20 when the years byte changes from 99 to 00. The
Y2K byte can contain only the values of 19 or 20.
REV 1.1.4 5/31/01
Day of the Week Register (DW)
This register provides a Day of the Week status and
uses three bits DY2 to DY0 to represent the seven days
of the week. The counter advances in the cycle 0-1-2-
3-4-5-6-0-1-2-... The assignment of a numerical value
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Characteristics subject to change without notice.
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