欢迎访问ic37.com |
会员登录 免费注册
发布采购

X24022 参数 Datasheet PDF下载

X24022图片预览
型号: X24022
PDF下载: 下载PDF文件 查看货源
内容描述: 串行E2PROM [Serial E2PROM]
分类和应用: 可编程只读存储器
文件页数/大小: 14 页 / 60 K
品牌: XICOR [ XICOR INC. ]
 浏览型号X24022的Datasheet PDF文件第3页浏览型号X24022的Datasheet PDF文件第4页浏览型号X24022的Datasheet PDF文件第5页浏览型号X24022的Datasheet PDF文件第6页浏览型号X24022的Datasheet PDF文件第8页浏览型号X24022的Datasheet PDF文件第9页浏览型号X24022的Datasheet PDF文件第10页浏览型号X24022的Datasheet PDF文件第11页  
X24022
READ OPERATIONS
Read operations are initiated in the same manner as
write operations with the exception that the R/W bit of the
slave address is set to a one. There are three basic read
operations: current address read, random read and
sequential read.
It should be noted that the ninth clock cycle of the read
operation is not a “don’t care.” To terminate a read
operation, the master must either issue a stop condition
during the ninth cycle or hold SDA HIGH during the ninth
clock cycle and then issue a stop condition.
Current Address Read
Internally the X24022 contains an address counter that
maintains the address of the last word accessed,
incremented by one. Therefore, if the last access (either
a read or write) was to address n, the next read operation
would access data from address n + 1. Upon receipt of
the slave address with R/W set to one, the X24022
issues an acknowledge and transmits the eight bit word
Figure 7. Current Address Read
S
T
BUS ACTIVITY:
A
R
MASTER
T
SDA LINE
BUS ACTIVITY:
X24022
S
A
C
K
3848 FHD F13
during the next eight clock cycles. The read operation is
terminated by the master; by not responding with an
acknowledge and by issuing a stop condition. Refer to
Figure 7 for the sequence of address, acknowledge and
data transfer.
Random Read
Random read operations allow the master to access any
memory location in a random manner. Prior to issuing
the slave address with the R/W bit set to one, the master
must first perform a “dummy” write operation. The mas-
ter issues the start condition, and the slave address
followed by the word address it is to read. After the word
address acknowledge, the master immediately reissues
the start condition and the slave address with the R/W bit
set to one. This will be followed by an acknowledge from
the X24022 and then by the eight bit word. The read
operation is terminated by the master; by not responding
with an acknowledge and by issuing a stop condition.
Refer to Figure 8 for the address, acknowledge and data
transfer sequence.
SLAVE
ADDRESS
DATA
S
T
O
P
P
Figure 8. Random Read
S
T
BUS ACTIVITY:
A
R
MASTER
T
SDA LINE
BUS ACTIVITY:
X24022
S
A
C
K
A
C
K
S
T
A
R
T
S
A
C
K
3848 FHD F14
SLAVE
ADDRESS
WORD
ADDRESS n
SLAVE
ADDRESS
DATA n
S
T
O
P
P
7