X24325
Bus Timing
tF
SCL
tSU:STA
SDA IN
tAA
SDA OUT
6552 ILL F17
tHIGH
tLOW
tR
tHD:STA
tHD:DAT
tSU:DAT
tSU:STO
tDH
tBUF
Write Cycle Limits
Symbol
t
WR(6)
Parameter
Write Cycle Time
Min.
Typ.
(5)
5
Max.
10
Units
ms
6552 FRM T11.1
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the
Bus Timing
X24325 bus interface circuits are disabled, SDA is
allowed to remain HIGH, and the device does not
respond to its slave address.
SCL
SDA
8th BIT
WORD n
ACK
tWR
STOP
CONDITION
START
CONDITION
6552 ILL F18
Notes: (5) Typical values are for T
A
= 25°C and nominal supply voltage (5V).
(6) t
WR
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
120
RESISTANCE (KΩ)
100
80
60
40
20
0
0
20
40
60
80 100 120
6552 ILL F19
SYMBOL TABLE
WAVEFORM
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
RMIN =
VCC MAX
=1.8KΩ
IOL MIN
tR
CBUS
RMAX =
MAX.
RESISTANCE
MIN.
RESISTANCE
BUS CAPACITANCE (pF)
13
XICOR [ XICOR INC. ]
