X25043/45
Figure 3. Write Enable Latch Sequence
CS
0
1
2
3
4
5
6
7
SCK
SI
HIGH IMPEDANCE
SO
3844 FHD F05
Figure 4. Byte Write Operation Sequence
CS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
SCK
SI
INSTRUCTION
8
BYTE ADDRESS
DATA BYTE
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
9TH BIT OF ADDRESS
HIGH IMPEDANCE
SO
3844 FHD F06
SYMBOL TABLE
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from LOW
to HIGH
Will change
from LOW
to HIGH
May change
from HIGH
to LOW
Will change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
6
XICOR [ XICOR INC. ]
