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X25320 参数 Datasheet PDF下载

X25320图片预览
型号: X25320
PDF下载: 下载PDF文件 查看货源
内容描述: SPI串行E2PROM带座LockTM保护 [SPI Serial E2PROM With Block LockTM Protection]
分类和应用: 可编程只读存储器
文件页数/大小: 15 页 / 72 K
品牌: XICOR [ XICOR INC. ]
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X25320  
PIN DESCRIPTIONS  
Serial Output (SO)  
Hold (HOLD)  
HOLD isusedinconjunctionwiththeCSpintoselectthe  
device. Once the part is selected and a serial sequence  
is underway, HOLD may be used to pause the serial  
communication with the controller without resetting the  
serial sequence. To pause, HOLD must be brought  
LOW while SCK is LOW. To resume communication,  
HOLD is brought HIGH, again while SCK is LOW. If the  
pause feature is not used, HOLD should be held HIGH  
at all times.  
SO is a push/pull serial data output pin. During a read  
cycle, data is shifted out on this pin. Data is clocked out  
by the falling edge of the serial clock.  
Serial Input (SI)  
SI is the serial data input pin. All opcodes, byte  
addresses, and data to be written to the memory are  
input on this pin. Data is latched by the rising edge of the  
serial clock.  
PIN CONFIGURATION  
Serial Clock (SCK)  
The Serial Clock controls the serial bus timing for data  
input and output. Opcodes, addresses, or data present  
on the SI pin are latched on the rising edge of the clock  
input, while data on the SO pin change after the falling  
edge of the clock input.  
DIP/SOIC  
CS  
SO  
WP  
1
2
3
4
8
7
6
5
V
CC  
HOLD  
SCK  
SI  
X25320  
TSSOP  
V
SS  
Chip Select (CS)  
WhenCS isHIGH, theX25320isdeselectedandtheSO  
output pin is at high impedance and unless an internal  
write operation is underway, the X25320 will be in the  
standby power mode. CS LOW enables the X25320,  
placing it in the active power mode. It should be noted  
that after power-on, a HIGH to LOW transition on CS is  
required prior to the start of any operation.  
CS  
SO  
NC  
NC  
NC  
WP  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
CC  
HOLD  
NC  
X25320  
NC  
NC  
Write Protect (WP)  
SCK  
SI  
V
8
When WP is LOW and the nonvolatile bit WPEN is “1”,  
nonvolatile writes to the X25320 status register are  
disabled, but the part otherwise functions normally.  
WhenWP isheldHIGH, allfunctions, includingnonvola-  
tile writes operate normally. WP going LOW while CS is  
still LOW will interrupt a write to the X25320 status  
register. If the internal write cycle has already been  
initiated, WP going LOW will have no effect on a write.  
SS  
3063 ILL F02.2  
PIN NAMES  
SYMBOL  
DESCRIPTION  
CS  
SO  
Chip Select Input  
Serial Output  
Serial Input  
The WP pin function is blocked when the WPEN bit in  
thestatusregisteris0”.Thisallowstheusertoinstallthe  
X25320 in a system with WP pin grounded and still be  
able to write to the status register. The WP pin functions  
will be enabled when the WPEN bit is set “1”.  
SI  
SCK  
WP  
VSS  
VCC  
HOLD  
NC  
Serial Clock Input  
Write Protect Input  
Ground  
Supply Voltage  
Hold Input  
No Connect  
3063 PGM T01  
2