X28C256
WRITE CYCLE LIMITS
Symbol
t
WC(7)
t
AS
t
AH
t
CS
t
CH
t
CW
t
OES
t
OEH
t
WP
t
WPH
t
WPH2(8)
t
DV
t
DS
t
DH
t
DW
t
BLC(9)
Parameter
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE
Pulse Width
OE
HIGH Setup Time
OE
HIGH Hold Time
WE
Pulse Width
WE
HIGH Recovery
SDP
WE
Recovery
Data Valid
Data Setup
Data Hold
Delay to Next Write
Byte Load Cycle
Min.
(9)
0
150
0
0
100
10
10
100
50
1
1
50
10
10
1
Typ.
(6)
5
Max.
10
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
µs
µs
3855 PGM T11.1
100
WE
Controlled Write Cycle
tWC
ADDRESS
tAS
tCS
CE
tAH
tCH
OE
tOES
WE
tDV
DATA IN
DATA VALID
tDS
DATA OUT
HIGH Z
3855 FHD F06
tWP
tOEH
tDH
Notes:
(6) Typical values are for T
A
= 25°C and nominal supply voltage.
(7) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
(8) t
WPH
is the normal page write operation
WE
recovery time. t
WPH2
is the
WE
recovery time needed only after the end of issuing
the three-byte SDP command sequence and before writing the first byte of data to the array. Refer to Figure 6 which illustrates
the t
WPH2
requirement.
(9) For faster t
WC
and t
BLC
, refer to X28HC256 or X28VC256.
13
XICOR [ XICOR INC. ]
