R
Spartan-II 2.5V FPGA Family: Introduction and Ordering Information
Spartan-II Product Availability
shows the package and speed grades available for
Spartan-II family devices.
shows the maximum user
I/Os available on the device and the number of user I/Os
available for each device/package combination. The four
Table 2:
Spartan-II Package and Speed Grade Availability
Pins
Type
Device
XC2S15
Code
-5
-6
XC2S30
-5
-6
XC2S50
-5
-6
XC2S100
-5
-6
XC2S150
-5
-6
XC2S200
-5
-6
100
Plastic
VQFP
VQ100
C, I
C
C, I
C
-
-
-
-
-
-
-
-
144
Plastic
TQFP
TQ144
C, I
C
C, I
C
C, I
C
C, I
C
-
-
-
-
144
Chip Scale
BGA
CS144
C, I
C
C, I
C
-
-
-
-
-
-
-
-
208
Plastic
PQFP
PQ208
-
-
C, I
C
C, I
C
C, I
C
C, I
C
C, I
C
256
Fine Pitch
BGA
FG256
-
-
-
-
C, I
C
C, I
C
C, I
C
C, I
C
456
Fine Pitch
BGA
FG456
-
-
-
-
-
-
C, I
C
C, I
C
C, I
C
global clock pins are usable as additional user I/Os when
not used as a global clock pin. These pins are not included
in user I/O counts.
Notes:
1. C = Commercial, T
J
= 0° to +85°C; I = Industrial, T
J
= –40°C to +100°C.
Table 3:
Spartan-II User I/O Chart
(1)
Maximum
User I/O
86
132
176
196
260
284
Available User I/O According to Package Type
VQ100
60
60
-
-
-
-
TQ144
86
92
92
92
-
-
CS144
86
92
-
-
-
-
PQ208
-
132
140
140
140
140
FG256
-
-
176
176
176
176
FG456
-
-
-
196
260
284
Device
XC2S15
XC2S30
XC2S50
XC2S100
XC2S150
XC2S200
Notes:
1. All user I/O counts do not include the four global clock/user input pins.
DS001-1 (v2.3) November 1, 2001
Preliminary Product Specification
1-800-255-7778
3
XILINX [ XILINX, INC ]
