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XC3S200-4FT256C 参数 Datasheet PDF下载

XC3S200-4FT256C图片预览
型号: XC3S200-4FT256C
PDF下载: 下载PDF文件 查看货源
内容描述: Spartan-3系列FPGA系列:完整的数据手册 [Spartan-3 FPGA Family : Complete Data Sheet]
分类和应用:
文件页数/大小: 192 页 / 1695 K
品牌: XILINX [ XILINX, INC ]
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Spartan-3 FPGA Family: Introduction and Ordering Information
R
Architectural Overview
The Spartan-3 family architecture consists of five funda-
mental programmable functional elements:
Configurable Logic Blocks (CLBs) contain RAM-based
Look-Up Tables (LUTs) to implement logic and storage
elements that can be used as flip-flops or latches.
CLBs can be programmed to perform a wide variety of
logical functions as well as to store data.
Input/Output Blocks (IOBs) control the flow of data
between the I/O pins and the internal logic of the
device. Each IOB supports bidirectional data flow plus
3-state operation. Twenty-four different signal
standards,
including
seven
high-performance
differential standards, are available as shown in
Double Data-Rate (DDR) registers are
included. The Digitally Controlled Impedance (DCI)
feature provides automatic on-chip terminations,
simplifying board designs.
Block RAM provides data storage in the form of 18-Kbit
dual-port blocks.
Multiplier blocks accept two 18-bit binary numbers as
inputs and calculate the product.
Digital Clock Manager (DCM) blocks provide
self-calibrating, fully digital solutions for distributing,
delaying, multiplying, dividing, and phase shifting clock
signals.
These elements are organized as shown in
A ring
of IOBs surrounds a regular array of CLBs. The XC3S50
has a single column of block RAM embedded in the array.
Those devices ranging from the XC3S200 to the XC3S2000
have two columns of block RAM. The XC3S4000 and
XC3S5000 devices have four RAM columns. Each column
is made up of several 18K-bit RAM blocks; each block is
associated with a dedicated multiplier. The DCMs are posi-
tioned at the ends of the outer block RAM columns.
The Spartan-3 family features a rich network of traces and
switches that interconnect all five functional elements,
transmitting signals among them. Each functional element
has an associated switch matrix that permits multiple con-
nections to the routing.
DS099-1_01_032703
Notes:
1. The two additional block RAM columns of the XC3S4000 and XC3S5000
devices are shown with dashed lines. The XC3S50 has only the block RAM
column on the far left.
Figure 1:
Spartan-3 Family Architecture
2
6
1-800-255-7778
Advance Product Specification