R
Spartan-3 FPGA Family: DC and Switching Characteristics
V
OUTP
Internal
Logic
V
OUTN
P
N
Differential
I/O Pair Pins
V
OUTN
V
OUTP
GND level
50%
V
OH
V
OD
V
OCM
V
OL
V
OCM
= Output common mode voltage =
V
OUTP
+ V
OUTN
2
V
OD
= Output differential voltage = V
OUTP
- V
OUTN
V
OH
= Output voltage indicating a High logic level
V
OL
= Output voltage indicating a Low logic level
DS099-3_02_012304
Figure 2:
Differential Output Voltages
Table 11:
DC Characteristics of User I/Os Using Differential Signal Standards
V
OD
Signal Standard
LDT_25
LVDS_25
Device
Revision
All
(3)
0
(3)
Future
BLVDS_25
LVDSEXT_25
All
0
(3)
Future
ULVDS_25
LVPECL_25
(7)
RSDS_25
All
(3)
All
0
(3)
Future
Min
(mV)
430
(4)
100
250
250
100
330
430
-
100
100
Typ
(mV)
600
-
-
350
-
-
600
-
-
-
Max
(mV)
670
600
400
450
600
700
670
-
600
400
∆V
OD
Min
(mV)
–15
-
-
-
-
-
-
-
-
-
Max
(mV)
15
-
-
-
-
-
-
-
-
-
Min
(V)
0.495
0.80
1.125
V
OCM
Typ
(V)
0.600
-
-
1.20
-
-
0.600
-
-
-
Max
(V)
0.715
1.6
1.375
∆V
OCM
Min
(mV)
–15
-
-
-
-
-
-
-
-
-
Max
(mV)
15
-
-
-
-
-
-
-
-
-
Min
(V)
-
-
1.00
-
-
-
-
1.35
-
-
V
OH
Max
(V)
-
-
1.475
-
-
1.700
-
1.745
-
-
Min
(V)
-
-
0.925
-
-
0.705
-
0.565
-
-
V
OL
Max
(V)
-
-
1.38
-
-
-
-
1.005
-
-
-
0.80
1.125
0.495
-
0.80
1.1
-
1.6
1.375
0.715
-
1.6
1.4
Notes:
1. The numbers in this table are based on the conditions set forth in
and
2. V
OD
,
∆V
OD
, and
∆V
OCM
are differential measurements.
3. For this standard, to ensure that the FPGA’s output pair meets specifications, it is necessary to set the
LVDSBIAS
option in the BitGen utility, part of
the Xilinx development software. See
The option settings for LVDS_25, LVDSEXT_25, and RSDS_25 are different from those for LDT_25
and ULVDS_25.
4. This value must be compatible with the receiver to which the FPGA’s output pair is connected.
5. Output voltage measurements for all differential standards are made with a termination resistor (R
T
) of 100Ω across the N and P pins of the differential
signal pair.
6. At any given time, only one differential standard may be assigned to each bank.
7. Each LVPECL output-pair requires three external resistors: a 70Ω resistor in series with each output followed by a 240Ω shunt resistor. These are in
addition to the external 100Ω termination resistor at the receiver side. See
70Ω
240Ω
70Ω
100Ω
ds099-3_08_020304
Figure 3:
External Terminations for LVPECL
DS099-3 (v1.3) March 4, 2004
Advance Product Specification
40
1-800-255-7778
9
XILINX [ XILINX, INC ]
