Spartan-3 FPGA Family: DC and Switching Characteristics
R
Digital Clock Manager (DCM) Timing
For specification purposes, the DCM consists of three key
components: the Delay-Locked Loop (DLL), the Digital Fre-
quency Synthesizer (DFS), and the Phase Shifter (PS).
Aspects of DLL operation play a role in all DCM applica-
tions. All such applications inevitably use the CLKIN and the
CLKFB inputs connected to either the CLK0 or the CLK2X
feedback, respectively. Thus, specifications in the DLL
tables (Table
and
apply to any application that
only employs the DLL component. When the DFS and/or
the PS components are used together with the DLL, then
the specifications listed in the DFS and PS tables (Table
through
supersede any corresponding ones in the
DLL tables. DLL specifications that do not change with the
addition of DFS or PS functions are presented in
and
Table 27:
Recommended Operating Conditions for the DLL
Speed Grade
Frequency
Mode/
F
CLKIN
Range
Low
High
Device
Revision
-5
Min
24
(2)
48
48
Max
165
(3)
280
(3)
326
Min
-4
Max
165
(3)
280
(3)
TBD
Units
Symbol
Input Frequency Ranges
F
CLKIN
CLKIN_FREQ_DLL_LF
CLKIN_FREQ_DLL_HF
Input Pulse Requirements
CLKIN_PULSE
Description
Frequency for the
CLKIN input
All
0
Future
24
48
48
MHz
MHz
MHz
CLKIN pulse width as
a percentage of the
CLKIN period
All
F
CLKIN
< 200 MHz
F
CLKIN
> 200 MHz
0
Future
45%
40%
45%
55%
60%
55%
45%
40%
45%
55%
60%
55%
-
-
-
Input Clock Jitter and Delay Path Variation
CLKIN_CYC_JITT_DLL_LF
CLKIN_CYC_JITT_DLL_HF
CLKIN_CYC_PER_DLL_LF
CLKIN_CYC_PER_DLL_HF
CLKFB_DELAY_VAR_EXT
Cycle-to-cycle jitter at
the CLKIN input
Period jitter at the
CLKIN input
Allowable variation of
off-chip feedback delay
from the DCM output
to the CLKFB input
Low
High
Low
High
All
All
-300
-150
-1
-1
-1
+300
+150
+1
+1
+1
-300
-150
-1
-1
-1
+300
+150
+1
+1
+1
ps
ps
ns
ns
ns
Notes:
1. DLL specifications apply when any of the DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, or CLKDV) are in use.
2. Use of the DFS permits lower F
CLKIN
frequencies. See
3. To double the maximum effective F
CLKIN
limit, set the CLKIN_DIVIDE_BY_2 attribute to TRUE.
28
1-800-255-7778
DS099-3 (v1.3) March 4, 2004
Advance Product Specification
XILINX [ XILINX, INC ]
