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XC3S200-4VQG100C 参数 Datasheet PDF下载

XC3S200-4VQG100C图片预览
型号: XC3S200-4VQG100C
PDF下载: 下载PDF文件 查看货源
内容描述: Spartan-3系列FPGA系列:完整的数据手册 [Spartan-3 FPGA Family: Complete Data Sheet]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 198 页 / 1762 K
品牌: XILINX [ XILINX, INC ]
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06
R
Spartan-3 FPGA Family:
Introduction and Ordering
Information
0
DS099-1 (v1.4) January 17, 2005
0
Preliminary Product Specification
Three power rails: for core (1.2V), I/Os (1.2V to
3.3V), and auxiliary purposes (2.5V)
SelectIO™ signaling
- Up to 784 I/O pins
- 622 Mb/s data transfer rate per I/O
- 18 single-ended signal standards
- 6 differential I/O standards including LVDS, RSDS
- Termination by Digitally Controlled Impedance
- Signal swing ranging from 1.14V to 3.45V
- Double Data Rate (DDR) support
Logic resources
- Abundant logic cells with shift register capability
- Wide multiplexers
- Fast look-ahead carry logic
- Dedicated 18 x 18 multipliers
- JTAG logic compatible with IEEE 1149.1/1532
SelectRAM™ hierarchical memory
- Up to 1,872 Kbits of total block RAM
- Up to 520 Kbits of total distributed RAM
Digital Clock Manager (up to four DCMs)
- Clock skew elimination
- Frequency synthesis
- High resolution phase shifting
Eight global clock lines and abundant routing
Fully supported by Xilinx ISE development system
- Synthesis, mapping, placement and routing
MicroBlaze™ processor, PCI, and other cores
Pb-free packaging options
Low-power Spartan-3L Family and Automotive
Spartan-3 XA Family options
Maximum
Differential
I/O Pairs
56
76
116
175
221
270
312
344
Introduction
The Spartan™-3 family of Field-Programmable Gate Arrays
is specifically designed to meet the needs of high volume,
cost-sensitive consumer electronic applications. The
eight-member family offers densities ranging from 50,000 to
five million system gates, as shown in
The Spartan-3 family builds on the success of the earlier
Spartan-IIE family by increasing the amount of logic
resources, the capacity of internal RAM, the total number of
I/Os, and the overall level of performance as well as by
improving clock management functions. Numerous
enhancements derive from state-of-the-art Virtex™-II tech-
nology. These Spartan-3 enhancements, combined with
advanced process technology, deliver more functionality
and bandwidth per dollar than was previously possible, set-
ting new standards in the programmable logic industry.
Because of their exceptionally low cost, Spartan-3 FPGAs
are ideally suited to a wide range of consumer electronics
applications, including broadband access, home network-
ing, display/projection and digital television equipment.
The Spartan-3 family is a superior alternative to mask pro-
grammed ASICs. FPGAs avoid the high initial cost, the
lengthy development cycles, and the inherent inflexibility of
conventional ASICs. Also, FPGA programmability permits
design upgrades in the field with no hardware replacement
necessary, an impossibility with ASICs.
-
Features
Very low cost, high-performance logic solution for
high-volume, consumer-oriented applications
- Densities as high as 74,880 logic cells
Table 1:
Summary of Spartan-3 FPGA Attributes
System Equivalent
Gates Logic Cells Rows Columns Total CLBs
50K
200K
400K
1M
1.5M
2M
4M
5M
1,728
4,320
8,064
17,280
29,952
46,080
62,208
74,880
16
24
32
48
64
80
96
104
12
20
28
40
52
64
72
80
192
480
896
1,920
3,328
5,120
6,912
8,320
CLB Array
(One CLB = Four Slices)
Device
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Distributed
RAM (bits
)
12K
30K
56K
120K
208K
320K
432K
520K
Block RAM
(bits
)
72K
216K
288K
432K
576K
720K
1,728K
1,872K
Dedicated
Multipliers
4
12
16
24
32
40
96
104
DCMs
2
4
4
4
4
4
4
4
Maximum
User I/O
124
173
264
391
487
565
712
784
Notes:
1. By convention, one Kb is equivalent to 1,024 bits.
2. These devices are available in Xilinx Automotive versions as described in
Spartan-3 Automotive XA FPGA Family.
3. XC3S1000, XC3S1500, and XC3S4000 are also available in lower static power versions as described in
Spartan-3L Low Power FPGA Family.
© 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS099-1 (v1.4) January 17, 2005
Preliminary Product Specification
1