ISO-CMOS MT093
AC Electrical Characteristics† - Crosspoint Performance-V is the external DC offset applied at the analog
DC
I/O pins. Voltages are with respect to V =7V, V =0V, V =-7V, unless otherwise stated.
DD
DC
SS
‡
Characteristics
Sym
Min
Typ
Max Units
Test Conditions
f=1 MHz
f=1 MHz
1
2
3
Switch I/O Capacitance
C
C
20
pF
pF
S
Feedthrough Capacitance
0.2
45
F
Frequency Response
Channel “ON”
F
MHz Switch is “ON”; V
= 2Vpp
3dB
INA
sinewave; R = 1kΩ
L
20LOG(V
/V )=-3dB
OUT Xi
4
5
Total Harmonic Distortion
THD
FDT
0.05
-95
%
Switch is “ON”; V
INA
sinewave f= 1kHz; R =1kΩ
= 2Vpp
L
Feedthrough
dB
All Switches “OFF”; V
=
INA
Channel “OFF”
2Vpp sinewave f= 1kHz;
Feed.=20LOG (V
/V )
R = 1kΩ.
OUT Xi
L
6
Crosstalk between any two
channels for switches Xi-Yi and
Xj-Yj.
X
-45
-90
-85
-80
dB
dB
dB
dB
ns
V
=2Vpp sinewave
INA
talk
f= 10MHz; R = 75Ω.
L
V
=2Vpp sinewave
INA
f= 10kHz; R = 600Ω.
L
Xtalk=20LOG (V /V ).
Yj Xi
V
=2Vpp sinewave
INA
f= 10kHz; R = 1kΩ.
L
V
=2Vpp sinewave
INA
f= 1kHz; R = 10kΩ.
L
7
Propagation delay through
switch
t
50
R =1kΩ; C =50pF
PS
L
L
† Timing is over recommended temperature range.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Crosstalk measurements are for Plastic DIPS only, crosstalk values for PLCC packages are approximately 5dB better.
AC Electrical Characteristics† - Control and I/O Timings- V is the external DC offset applied at the analog
DC
I/O pins. Voltages are with respect to V =7V, V =0V, V =-7V, unless otherwise stated.
DD
DC
SS
‡
Characteristics
Sym
Min
Typ
Max
Units
mVpp V =3V+V
DC
Test Conditions
1
Control Input crosstalk to switch
(for DATA, STROBE, Address)
CX
50
squarewave;
talk
IN
R =1kΩ, R =10kΩ.
IN
L
2
3
4
5
6
7
8
9
Digital Input Capacitance
Switching Frequency
C
F
t
10
pF
MHz
ns
f=1MHz
DI
10
O
Setup Time DATA to STROBE
Hold Time DATA to STROBE
20
20
20
20
40
80
R = 1kΩ, C =50pF
L L
DS
t
ns
R = 1kΩ, C =50pF
L L
DH
Setup Time Address to STROBE
Hold Time Address to STROBE
STROBE Pulse Width
t
t
ns
R = 1kΩ, C =50pF
L L
AS
ns
R = 1kΩ, C =50pF
L L
AH
t
t
ns
R = 1kΩ, C =50pF
L L
SPW
RESET Pulse Width
ns
R = 1kΩ, C =50pF
L L
RPW
10 STROBE to Switch Status Delay
11 DATA to Switch Status Delay
12 RESET to Switch Status Delay
t
80
200
200
200
ns
R = 1kΩ, C =50pF
L L
S
t
100
70
ns
R = 1kΩ, C =50pF
L L
D
t
ns
R = 1kΩ, C =50pF
L L
R
† Timing is over recommended temperature range.
Digital Input rise time (tr) and fall time (tf) = 10ns.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
*
3-69
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
