MT093 ISO-CMOS
t
RPW
50%
50%
RESET
t
SPW
STROBE
50%
50%
50%
t
AS
ADDRESS
50%
50%
t
AH
DATA
50%
50%
t
DS
t
DH
ON
SWITCH*
OFF
t
t
t
R
R
t
S
D
Figure 3 - Control Memory Timing Diagram
AX0
AX1
AX2
AX3
AY0
AY1
AY2
Connection
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X0-Y0
X1-Y0
X2-Y0
X3-Y0
X4-Y0
X5-Y0
➀
➀
No Connection
No Connection
X6-Y0
X7-Y0
X8-Y0
X9-Y0
X10-Y0
X11-Y0
➀
➀
No Connection
No Connection
0
↓
1
0
↓
0
0
↓
1
0
↓
1
1
↓
1
0
↓
0
0
↓
0
X0-Y1
↓ ↓
X11-Y1
X0-Y2
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
0
↓
0
1
↓
1
0
↓
0
X11-Y2
X0-Y3
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
1
↓
1
1
↓
1
0
↓
0
X11-Y3
X0-Y4
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
0
↓
0
0
↓
0
1
↓
1
X11-Y4
X0-Y5
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
1
↓
1
0
↓
0
1
↓
1
X11-Y5
X0-Y6
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
0
↓
0
1
↓
1
1
↓
1
X11-Y6
X0-Y7
↓ ↓
0
↓
1
0
↓
0
0
↓
1
0
↓
1
1
↓
1
1
↓
1
1
↓
1
X11-Y7
Table 1. Address Decode Truth Table
This address has no effect on device status.
➀
3-70