ZL50016
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Three programmable delayed frame pulse outputs
Data Sheet
Per-channel constant or variable throughput delay for frame integrity and low latency applications
Per Stream (16) Bit Error Rate Test circuits complying to ITU-O.151
Per-channel high impedance output control
Per-channel message mode
Control interface compatible with Intel and Motorola 16-bit non-multiplexed buses
Connection memory block programming
Supports ST-BUS and GCI-Bus standards for input and output timing
IEEE-1149.1 (JTAG) test port
3.3 V I/O with 5 V tolerant inputs; 1.8 V core voltage
Applications
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PBX and IP-PBX
Small and medium digital switching platforms
Remote access servers and concentrators
Wireless base stations and controllers
Multi service access platforms
Digital Loop Carriers
Computer Telephony Integration
Description
The ZL50016 is a maximum 1024 x 1024 channel non-blocking digital Time Division Multiplex (TDM) switch. It has
sixteen input streams (STi0 - 15) and sixteen output streams (STio0 - 15). The device can switch 64 kbps and
Nx64 kbps TDM channels from any input stream to any output stream. Each of the input and output streams can be
independently programmed to operate at any of the following data rates: 2.048 Mbps, 4.096 Mbps, 8.192 Mbps or
16.384 Mbps. The ZL50016 provides up to eight high impedance control outputs (STOHZ0 - 7) to support the use
of external tristate drivers for the first eight output streams (STio0 - 15). The output streams can be configured to
operate in bi-directional mode, in which case STi0 - 15 will be ignored.
The device contains two types of internal memory - data memory and connection memory. There are four modes of
operation - Connection Mode, Message Mode, BER mode and high impedance mode. In Connection Mode, the
contents of the connection memory define, for each output stream and channel, the source stream and channel
(the actual data to be output is stored in the data memory). In Message Mode, the connection memory is used for
the storage of microprocessor data. Using Zarlink's Message Mode capability, microprocessor data can be
broadcast to the data output streams on a per-channel basis. This feature is useful for transferring control and
status information for external circuits or other TDM devices. In BER mode the output channel data is replaced with
a pseudorandom bit sequence (PRBS) from one of 16 PRBS generators that generates a 2
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-1 pattern. On the
input side channels can be routed to one of 16 bit error detectors. In high impedance mode the selected output
channel can be put into a high impedance state.
The configurable non-multiplexed microprocessor port allows users to program various device operating modes
and switching configurations. Users can employ the microprocessor port to perform register read/write, connection
memory read/write, and data memory read operations. The port is configurable to interface with either Motorola or
Intel-type microprocessors.
The device also supports the mandatory requirements of the IEEE-1149.1 (JTAG) standard via the test port.
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
