ZL50031
Pin Description (continued)
256 Pin HQFP
143 TO 140
Name
LSTi8 - 11
Description
Data Sheet
Local Serial Input Streams 8 to 11 (5 V Tolerant Inputs):
In 2 Mb/s,
4 Mb/s or 8 Mb/s mode, these inputs accept data rates of 2.048 Mb/s,
4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per stream
respectively.
Local Serial Input Streams 12 to 15 (5 V Tolerant Inputs):
In 2 Mb/s,
4 Mb/s or 8 Mb/s mode, these inputs accept data rates of 2.048 Mb/s,
4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per stream
respectively.
Local Serial Output Streams 0 to 3 (5 V Tolerant Tri-state Outputs):
In 2 Mb/s, 4 Mb/s or 8 Mb/s mode, these outputs have data rates of
2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per
stream respectively.
Local Serial Output Streams 4 to 7 (5 V Tolerant Tri-state Outputs):
In
2 Mb/s, 4 Mb/s or 8 Mb/s mode, these outputs have data rates of
2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per
stream respectively.
Local Serial Output Streams 8 to 11 (5 V Tolerant Tri-state Outputs):
In
2 Mb/s, 4 Mb/s or 8 Mb/s mode, these outputs have data rates of
2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per
stream respectively.
Local Serial Output Streams 12 to 15 (5 V Tolerant Tri-state Outputs):
In
2 Mb/s, 4 Mb/s or 8 Mb/s mode, these outputs have data rates of
2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s with 32, 64 or 128 channels per
stream respectively.
Output Drive Enable (5 V Tolerant Input).
When this pin is low, LSTo0-15,
BSTio0-31, C1M5o, C32/64o, ST_CKo0, ST_CKo1, ST_FPo0 and
ST_FPo1 outputs are all in high-impedance state. When ODE is high all of
the aforementioned pins are active.
Master Clock (5 V Tolerant Input).
This pin accepts a 20.000 MHz clock.
Clock A (5 V Tolerant I/O).
This is an 8.192 MHz clock with 50% duty cycle.
139 to 136
LSTi12 - 15
117 to 114
LSTo0 - 3
111 to 108
LSTo4 - 7
105 to 102
LSTo8 - 11
99 to 96
LSTo12 - 15
79
ODE
46
76
75
73
72
74
71
68
67
C20i
C8_A_io
FRAME_A_io
Frame Reference A (5 V Tolerant I/O).
This is a 122 ns wide, negative
pulse, with 125
µs
period.
C8_B_io
Clock B (5 V Tolerant I/O).
This is an 8.192 MHz clock with 50% duty cycle.
FRAME_B_io
Frame Reference B (5 V Tolerant I/O).
This is a 122 ns wide, negative
pulse, with 125
µs
period.
FAIL_A
FAIL_B
CTREF1
CTREF2
A Failure (Output).
When the C8_A_io or the FRAME_A_io signal fails, this
signal goes to high.
B Failure (Output).
When the C8_B_io or the FRAME_B_io signal fails, this
signal goes to high.
CT-Bus Reference 1 (5 V Tolerant Input).
This pin accepts 8 kHz,
1.544 MHz or 2.048 MHz network timing reference.
CT-Bus Reference 2 (5 V Tolerant Input).
This pin accepts 8 kHz,
1.544 MHz or 2.048 MHz network timing reference.
9
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
