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ZL50234QCG1 参数 Datasheet PDF下载

ZL50234QCG1图片预览
型号: ZL50234QCG1
PDF下载: 下载PDF文件 查看货源
内容描述: 8信道语音回声消除器 [8 Channel Voice Echo Canceller]
分类和应用: 数字传输接口电信电路
文件页数/大小: 44 页 / 659 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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ZL50234  
Data Sheet  
Pin Description (continued)  
PIN #  
PIN  
Description  
Name  
100 PIN  
LQFP  
208-Ball LBGA  
NC  
A14, C15, D1, D15, E1, 24, 25, 26, No connection. These pins must be left open for normal  
F1, G1, G15, H1, H15, 44, 45, 46, operation.  
J1, J15, K1,  
47, 49, 51,  
52, 53, 54,  
55, 73, 74,  
75, 76, 78,  
79, 80, 82,  
83, 84, 85,  
89, 99, 50  
K15,L1,L15,F2,L2  
Interrupt Request (Open Drain Output). This output goes low  
when an interrupt occurs in any channel. IRQ returns high when  
all the interrupts have been read from the Interrupt FIFO  
R9  
9
IRQ  
Register. A pull-up resistor (1 K typical) is required at this output.  
R11  
R13  
R5  
10  
11  
12  
13  
Data Strobe (Input). This active low input works in conjunction  
DS  
CS  
with CS to enable the read and write operations.  
Chip Select (Input). This active low input is used by a  
microprocessor to activate the microprocessor port.  
Read/Write (Input). This input controls the direction of the data  
R/W  
DTA  
bus lines (D7-D0) during a microprocessor access.  
R7  
Data Transfer Acknowledgment (Open Drain Output). This  
active low output indicates that a data bus transfer is completed.  
A pull-up resistor (1K typical) is required at this output.  
D0..D7  
T2,T4,T6,T8,T9,T11, 15, 16, 17, Data Bus D0 - D7 (Bidirectional). These pins form the 8-bit  
T13,T15  
19, 20, 21, bidirectional data bus of the microprocessor port.  
22, 23  
A0..A10 P16,N16,M16,L16,K16, 28, 29, 30, Address A0 to A10 (Input). These inputs provide the A10 - A0  
J16,H16,G16,F16,E16, 31, 33, 34, address lines to the internal registers.  
D16  
35, 36, 38,  
39, 40  
ODE  
B13  
57  
Output Drive Enable (Input). This input pin is logically AND’d  
with the ODE bit-6 of the Main Control Register. When both ODE  
bit and ODE input pin are high, the Rout and Sout ST-BUS  
outputs are enabled.  
When the ODE bit is low or the ODE input pin is low, the Rout  
and Sout ST-BUS outputs are high impedance.  
Sout  
Rout  
Sin  
A8  
B9  
58  
59  
60  
Send PCM Signal Output (Output). Port 1 TDM data output  
streams. Sout pin outputs serial TDM data streams at  
2.048 Mbps with 8 channels per stream.  
Receive PCM Signal Output (Output). Port 2 TDM data output  
streams. Rout pin outputs serial TDM data streams at  
2.048 Mbps with 8 channels per stream.  
B11  
Send PCM Signal Input (Input). Port 2 TDM data input streams.  
Sin pin receives serial TDM data streams at 2.048 Mbps with 8  
channels per stream.  
8
Zarlink Semiconductor Inc.