ZL50404
13.3.6.8
SFCB – Share FCB Size
Data Sheet
I²C Address h074, CPU Address 518
Accessed by CPU and I²C (R/W)
Bits [7:0]:
Expressed in multiples of 16 granules. Buffer reservation for shared pool.
13.3.6.9
C1RS – Class 1 Reserve Size
I²C Address h075, CPU Address 519
Accessed by CPU and I²C (R/W)
Bits [7:0]:
Class 1 FCB Reservation
Buffer reservation for class 1. Granularity 16 granules.
(Default 0)
13.3.6.10
C2RS – Class 2 Reserve Size
I²C Address h076, CPU Address 51A
Accessed by CPU and I²C (R/W)
Bits [7:0]:
Class 2 FCB Reservation
Buffer reservation for class 2. Granularity 16 granules.
(Default 0)
13.3.6.11
C3RS – Class 3 Reserve Size
I²C Address h077, CPU Address 51B
Accessed by CPU and I²C (R/W)
Bits [7:0]:
Class 3 FCB Reservation
Buffer reservation for class 3. Granularity 16 granules.
(Default 0)
13.3.6.12
AVPML – VLAN Tag Priority Map
I²C Address h056; CPU Address:h530
Accessed by CPU and I²C (R/W)
Registers AVPML, AVPMM, and AVPMH allow the eight VLAN Tag priorities to map into eight Internal level
transmit priorities. Under the Internal transmit priority, seven is the highest priority where as zero is the lowest. This
feature allows the user the flexibility of redefining the VLAN priority field. For example, programming a value of 7
into bit 2:0 of the AVPML register would map packet VLAN priority 0 into Internal transmit priority 7. The new priority
is used inside the ZL50404. When the packet goes out it carries the original priority.
Bit [2:0]:
Bit [5:3]:
Bit [7:6]:
Priority when the VLAN tag priority field is 0 (Default 0)
Priority when the VLAN tag priority field is 1 (Default 0)
Priority when the VLAN tag priority field is 2 (Default 0)
80
Zarlink Semiconductor Inc.
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