Z8 Encore! XP® 4K Series
Product Specification
17
Table 8. Register File Address Map (Continued)
Address (Hex) Register Description
Mnemonic
T1CTL0
T1CTL1
—
Reset (Hex)
Page #
78
F0E
Timer 1 Control 0
Timer 1 Control 1
Reserved
00
00
XX
F0F
76
F10–F6F
UART
F40
F41
F42
F43
F44
F45
F46
F47
UART Transmit/Receive Data Registers TXD, RXD
XX
00
00
00
00
00
FF
FF
100
101
103
103
103
106
106
106
UART Status 0 Register
U0STAT0
U0CTL0
U0CTL1
U0STAT1
U0ADDR
U0BRH
UART Control 0 Register
UART Control 1 Register
UART Status 1 Register
UART Address Compare Register
UART Baud Rate High Byte Register
UART Baud Rate Low Byte Register
U0BRL
Analog-to-Digital Converter (ADC)
F70
ADC Control 0
ADCCTL0
ADCCTL1
ADCD_H
ADCD_L
ADCTHH
—
00
124
124
127
127
128
F71
ADC Control 1
80
F72
ADC Data High Byte
ADC Data Low Bits
ADC High Threshold High Byte
Reserved
XX
XX
FF
XX
00
F73
F74
F75
F76
ADC Low Threshold High Byte
Reserved
ADCTLH
—
128
31
F77–F7F
XX
Low Power Control
F80
F81
Power Control 0
PWRCTL0
—
80
Reserved
XX
LED Controller
F82
F83
F84
F85
LED Drive Enable
LEDEN
LEDLVLH
LEDLVLL
—
00
00
00
XX
47
48
48
LED Drive Level High Byte
LED Drive Level Low Byte
Reserved
Oscillator Control
F86
Oscillator Control
Reserved
OSCCTL
—
A0
XX
183
131
F87–F8F
Comparator 0
F90
Comparator 0 Control
CMP0
14
XX=Undefined
PS022815-0206
Register Map
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