Z8 Encore! XP
®
4K Series
Product Specification
146
Table 83. Flash Page Select Register (FPS)
BITS
FIELD
RESET
R/W
ADDR
7
INFO_EN
0
R/W
0
R/W
0
R/W
0
R/W
FF9H
6
5
4
3
PAGE
0
R/W
0
R/W
0
R/W
0
R/W
2
1
0
INFO_EN—Information Area Enable
0 = Information Area us not selected
1 = Information Area is selected. The Information Area is mapped into the Program Mem-
ory address space at addresses
FE00H
through
FFFFH.
PAGE—Page Select
This 7-bit field identifies the Flash memory page for Page Erase and page unlocking.
Program Memory Address[15:9] = PAGE[6:0]. For the Z8F04xx devices, the upper 4 bits
must be zero. For Z8F02xx devices, the upper 5 bits must always be 0. For the Z8F01xx
devices, the upper 6 bits must always be 0.
Flash Sector Protect Register
The Flash Sector Protect (FPROT) register is shared with the Flash Page Select Register.
When the
is written with 73H followed by 5EH, the next write to
this address targets the Flash Sector Protect Register. In all other cases, it targets the Flash
Page Select Register.
This register selects one of the 8 available Flash memory sectors to be protected. The reset
state of each Sector Protect bit is an unprotected state. After a sector is protected by setting
its corresponding register bit, it cannot be unprotected (the register bit cannot be cleared)
without powering down the device.
Table 84. Flash Sector Protect Register (FPROT)
BITS
FIELD
RESET
R/W
ADDR
7
SPROT7
0
R/W
6
SPROT6
0
R/W
5
SPROT5
0
R/W
4
SPROT4
0
R/W
FF9H
3
SPROT3
0
R/W
2
SPROT2
0
R/W
1
SPROT1
0
R/W
0
SPROT0
0
R/W
PS022815-0206
Flash Memory
ZILOG [ ZILOG, INC. ]
