Z8 Encore!
®
64K Series
Product Specification
60
Table 20. Port A-H STOP Mode Recovery Source Enable Sub-Registers
BITS
FIELD
RESET
R/W
ADDR
7
PSMRE7
6
PSMRE6
5
PSMRE5
4
PSMRE4
0
R/W
3
PSMRE3
2
PSMRE2
1
PSMRE1
0
PSMRE0
If 05H in Port A
–
H Address Register, accessible through Port A-H Control Register
PSMRE[7:0]—Port STOP Mode Recovery Source Enabled
0 = The Port pin is not configured as a STOP Mode Recovery source. Transitions on this
pin during STOP mode do not initiate STOP Mode Recovery.
1 = The Port pin is configured as a STOP Mode Recovery source. Any logic transition on
this pin during STOP mode initiates STOP Mode Recovery.
Port A-H Input Data Registers
Reading from the Port A–H Input Data registers (Table 21) returns the sampled values
from the corresponding port pins. The Port A–H Input Data registers are Read-only.
Table 21. Port A
–
H Input Data Registers (PxIN)
BITS
FIELD
RESET
R/W
ADDR
7
PIN7
6
PIN6
5
PIN5
4
PIN4
X
R
3
PIN3
2
PIN2
1
PIN1
0
PIN0
FD2H, FD6H, FDAH, FDEH, FE2H, FE6H, FEAH, FEEH
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
PS019915-1005
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
