Z8 Encore!
®
64K Series
Product Specification
52
Table 11. Port Availability by Device and Package Type (Continued)
Device
Z8X6421
Z8X6421
Z8X6422
Z8X6423
Packages
40-pin
44-pin
64- and 68-pin
80-pin
Port A
[7:0]
[7:0]
[7:0]
[7:0]
Port B
[7:0]
[7:0]
[7:0]
[7:0]
Port C
[6:0]
[7:0]
[7:0]
[7:0]
Port D
[6:3, 1:0]
[6:0]
[7:0]
[7:0]
Port E
-
-
[7:0]
[7:0]
Port F
-
-
[7]
[7:0]
Port G
-
-
[3]
[7:0]
Port H
-
-
[3:0]
[3:0]
Architecture
ity to accommodate alternate functions and variable port current drive strength are not
illustrated.
Port Input
Data Register
Q
D
Schmitt Trigger
System
Clock
VDD
Port Output Control
Port Output
Data Register
DATA
Bus
System
Clock
D
Q
Port
Pin
Port Data Direction
GND
Figure 10. GPIO Port Pin Block Diagram
GPIO Alternate Functions
Many of the GPIO port pins can be used as both general-purpose I/O and to provide access
to on-chip peripheral functions such as the timers and serial communication devices. The
Port A–H Alternate Function sub-registers configure these pins for either general-purpose
PS019915-1005
General-Purpose I/O
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