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U62H256AS2K55G1 参数 Datasheet PDF下载

U62H256AS2K55G1图片预览
型号: U62H256AS2K55G1
PDF下载: 下载PDF文件 查看货源
内容描述: 汽车高速32K ×8 SRAM [AUTOMOTIVE FAST 32K X 8 SRAM]
分类和应用: 静态存储器
文件页数/大小: 10 页 / 162 K
品牌: ZMD [ Zentrum Mikroelektronik Dresden AG ]
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U62H256A
Switching Characteristics
Read Cycle
Read Cycle Time
Address Access Time to Data Valid
Chip Enable Access Time to Data Valid
G LOW to Data Valid
E HIGH to Output in High-Z
G HIGH to Output in High-Z
E LOW to Output in Low-Z
G LOW to Output in Low-Z
Output Hold Time from Address Change
E LOW to Power-Up Time
E HIGH to Power-Down Time
Symbol
Alt.
t
RC
t
AA
t
ACE
t
OE
t
HZCE
t
HZOE
t
LZCE
t
LZOE
t
OH
t
PU
t
PD
IEC
t
cR
t
a(A)
t
a(E)
t
a(G)
t
dis(E)
t
dis(G)
t
en(E)
t
en(G)
t
v(A)
3
0
3
0
35
Min.
35
Max.
Min.
55
Unit
Max.
35
35
35
15
15
12
55
55
55
25
20
15
3
0
3
0
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Switching Characteristics
Write Cycle
Write Cycle Time
Write Pulse Width
Write Setup Time
Address Setup Time
Address Valid to End of Write
Chip Enable Setup Time
Pulse Width Chip Enable to End of Write
Data Setup Time
Data Hold Time
Address Hold from End of Write
W LOW to Output in High-Z
G HIGH to Output in High-Z
W HIGH to Output in Low-Z
G LOW to Output in Low-Z
Symbol
Alt.
t
WC
t
WP
t
WP
t
AS
t
AW
t
CW
t
CW
t
DS
t
DH
t
AH
t
HZWE
t
HZOE
t
LZWE
t
LZOE
IEC
t
cW
t
w(W)
t
su(W)
t
su(A)
t
su(A-WH)
Min.
35
Max.
Min.
55
Unit
Max.
35
20
20
0
25
25
25
15
0
0
15
12
0
0
55
35
35
0
40
40
40
25
0
0
20
15
0
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
su(E)
t
w(E)
t
su(D)
t
h(D)
t
h(A)
t
dis(W)
t
dis(G)
t
en(W)
t
en(G)
April 20, 2004
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