93LC46A/B
3.6
ERASE/WRITE Disable and Enable
(EWDS/EWEN)
3.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (93LC46A) or 16-bit
(93LC46B) output string. The output data bits will tog-
gle on the rising edge of the CLK and are stable after
the specified time delay (T
PD
). Sequential read is pos-
sible when CS is held high. The memory data will auto-
matically cycle to the next register and output
sequentially.
The 93LC46A/B powers up in the ERASE/WRITE Dis-
able (EWDS) state. All programming modes must be
preceded by an ERASE/WRITE Enable (EWEN)
instruction. Once the EWEN instruction is executed,
programming remains enabled until an EWDS instruc-
tion is executed or Vcc is removed from the device. To
protect against accidental data disturbance, the EWDS
instruction can be used to disable all ERASE/WRITE
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent
of both the EWEN and EWDS instructions.
FIGURE 3-4:
CS
EWDS TIMING
T
CSL
CLK
DI
1
0
0
0
0
X
•••
X
FIGURE 3-5:
EWEN TIMING
T
CSL
CS
CLK
DI
1
0
0
1
1
X
•••
X
FIGURE 3-6:
CS
READ TIMING
CLK
DI
1
1
0
An
•••
A0
DO
HIGH-Z
0
Dx
•••
D0
Dx
•••
D0
Dx
•••
D0
DS21173E-page 6
©
1998 Microchip Technology Inc.
ETC [ ETC ]
