Specifications CD4013BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
Static Burn-In 1
(Note 1)
Static Burn-In 2
(Note 1)
Dynamic Burn-
In (Note 1)
Irradiation
(Note 2)
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K
±
5%, VDD = 18V
±
0.5V
2. Each pin except VDD and GND will have a series resistor of 47K
±
5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V
±
0.5V
OPEN
1, 2, 12, 13
1, 2, 12, 13
-
1, 2, 12, 13
GROUND
3-11
7
4, 6-8, 10
7
VDD
14
3-6, 8-11, 14
14
3-6, 8-11, 14
1, 2, 12, 13
3, 11
5, 9
9V
±
-0.5V
50kHz
25kHz
Logic Diagram
*
4(10)
RESET
CL
p
TG
n
CL
CL
p
TG
n
CL
MASTER SECTION
CL
p
TG
n
CL
CL
p
TG
n
CL
Q
1(13)
CL
CL
BUFFERED OUTPUTS
Q
2(12)
SLAVE SECTION
*
5(9)
DATA
*
6(8)
SET
*
3(11)
CL
14
7
VDD
VSS
* All inputs are protected by CMOS protection network
FIGURE 1. ONE OF TWO IDENTICAL FLIP-FLOPS
TRUTH TABLE
CL*
D
0
1
X
X
X
X
X
X
X
R
0
0
0
1
0
1
S
0
0
0
0
1
1
Q
0
1
Q
0
1
1
Q
1
0
Q
1
0
1
No
Change
Logic 0 = Low
Logic 1 = High
* = Level change
X = Don’t care
N(N) = FF1/FF2 terminal assignments
7-67
ETC [ ETC ]
