74ALS569各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

SN54ALS573C, SN54AS573A . . . J OR W PACKAGE

SN74ALS573C, SN74AS573A . . . DW OR N PACKAGE

(TOP VIEW)

• 3-State Buffer-Type Outputs Drive Bus

Lines Directly

• Bus-Structured Pinout

• True Logic Outputs

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), Standard Plastic (N) and

Ceramic (J) 300-mil DIPs, and Ceramic Flat

(W) Packages

OE

1D

2D

3D

4D

5D

6D

7D

8D

V

CC

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

1Q

2Q

3Q

4Q

5Q

6Q

description

13 7Q

12 8Q

These octal D-type transparent latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

11

GND

LE

SN54ALS573C, SN54AS573A . . . FK PACKAGE

(TOP VIEW)

While the latch-enable (LE) input is high, outputs

(Q) respond to the data (D) inputs. When LE islow,

the outputs are latched to retain the data that was

set up.

3

2

1

20 19

18

2Q

3Q

4Q

5Q

6Q

3D

4D

5D

6D

7D

4

5

6

7

8

17

16

15

14

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low) or a high-impedance state. In

thehigh-impedancestate, theoutputsneitherload

nor drive the bus lines significantly. The

high-impedance state and the increased drive

provide the capability to drive bus lines without

interface or pullup components.

9 10 11 12 13

OE does not affect internal operation of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

The SN54ALS573C and SN54AS573A are characterized for operation over the full military temperature range

of –55°C to 125°C. The SN74ALS573C and SN74AS573A are characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

Q

OE

L

LE

H

L

D

H

L

H

L

X

Q

0

H

X

Z

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

†

logic symbol

logic diagram (positive logic)

1

OE

1

EN

C1

OE

LE

11

LE

11

2

1D

3

19

18

17

16

15

14

13

12

1D

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

C1

1D

19

2D

4

1Q

2

1D

3D

5

4D

6

5D

7

6D

8

7D

9

To Seven Other Channels

8D

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

‡

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

CC

Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

I

Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Operating free-air temperature range, T : SN54ALS573C . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C

A

SN74ALS573C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN54ALS573C

MIN NOM MAX

SN74ALS573C

MIN NOM MAX

UNIT

V

Supply voltage

4.5

2

5

5.5

4.5

2

5

5.5

V

CC

High-level input voltage

Low-level input voltage

High-level output current

Low-level output current

Pulse duration, LE high

Setup time, data before LE↓

Hold time, data after LE↓

Operating free-air temperature

IH

0.7

–1

12

0.8

–2.6

24

V

IL

I

t

mA

ns

°C

OH

OL

w

25

10

7

su

h

7

T

A

–55

125

0

70

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

SN54ALS573C

SN74ALS573C

PARAMETER

TEST CONDITIONS

UNIT

†

MIN TYP

MAX

MIN TYP

MAX

V

= 4.5 V,

I = –18 mA

–1.2

V

IK

CC

I

= 4.5 V to 5.5 V,

I

= –0.4 mA

= –1 mA

= –2.6 mA

= 12 mA

= 24 mA

= 2.7 V

V

–2

V

CC

–2

CC

OH

OL

CC

2.4

V

OH

3.3

V

= 4.5 V

CC

2.4

3.2

0.25

0.35

0.25

0.4

0.5

20

V

OL

V

I

V

CC

V

CC

V

CC

V

CC

V

CC

V

CC

= 5.5 V,

V

20

–20

0.1

µA

OZH

OZL

I

O

V

= 0.4 V

–20

0.1

20

V = 7 V

I

mA

µA

V = 2.7 V

I

20

IH

V = 0.4 V

I

–0.13

–112

17

–0.1

–112

17

mA

IL

‡

V

O

= 2.25 V

–20

–30

O

Outputs high

Outputs low

10

15

16

10

15

16

I

V

CC

= 5.5 V

24

mA

CC

Outputs disabled

27

†

‡

All typical values are at V

= 5 V, T = 25°C.

A

CC

The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I

.

OS

switching characteristics (see Figure 1)

V

C

= 4.5 V to 5.5 V,

= 50 pF,

CC

L

R1 = 500 Ω,

R2 = 500 Ω,

T

A

FROM

TO

(OUTPUT)

PARAMETER

(INPUT)

UNIT

§

= MIN to MAX

SN54ALS573C SN74ALS573C

MIN

2

MAX

20

MIN

2

MAX

14

t

PLH

PHL

PLH

PHL

PZH

PZL

PHZ

PLZ

D

ns

Q

2

17

2

14

8

33

6

20

LE

8

24

6

19

4

28

3

18

OE

4

21

4

18

2

20

1

10

3

26

1

15

§

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

CC

Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

I

Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Operating free-air temperature range, T : SN54AS573A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C

A

SN74AS573A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN54AS573A

MIN NOM MAX

SN74AS573A

MIN NOM MAX

UNIT

V

Supply voltage

4.5

2

5

5.5

4.5

2

5

5.5

V

CC

High-level input voltage

Low-level input voltage

High-level output current

Low-level output current

Pulse duration, LE high

Setup time, data before LE↓

Hold time, data after LE↓

Operating free-air temperature

IH

0.8

–12

32

0.8

–15

48

V

IL

I

mA

ns

°C

OH

OL

t *

w

5.5

2

4.5

2

t

*

su

t *

3

h

T

A

–55

125

0

70

* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

SN54AS573A

SN74AS573A

PARAMETER

TEST CONDITIONS

UNIT

‡

MIN TYP

MAX

MIN TYP

MAX

V

= 4.5 V,

I = –18 mA

–1.2

V

IK

CC

I

= 4.5 V to 5.5 V,

I

= –2 mA

= –12 mA

= –15 mA

= 32 mA

= 48 mA

= 2.7 V

V

–2

V

CC

–2

CC

OH

OL

CC

2.4

V

OH

3.2

V

= 4.5 V

CC

2.4

3.3

0.28

0.5

V

OL

V

0.33

0.5

50

I

V

CC

V

CC

V

CC

V

CC

V

CC

V

CC

= 5.5 V,

V

50

–50

0.1

µA

OZH

OZL

I

O

V

= 0.4 V

–50

0.1

V = 7 V

I

mA

µA

V = 2.7 V

I

20

IH

V = 0.4 V

I

–0.1

–112

93

–0.5

–112

93

mA

IL

§

V

O

= 2.25 V

–30

O

Outputs high

Outputs low

56

55

65

56

55

65

I

V

CC

= 5.5 V

90

mA

CC

Outputs disabled

106

‡

§

All typical values are at V

= 5 V, T = 25°C.

A

CC

The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I

.

OS

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

switching characteristics (see Figure 1)

V

C

= 4.5 V to 5.5 V,

= 50 pF,

CC

L

R1 = 500 Ω,

R2 = 500 Ω,

T

A

FROM

TO

(OUTPUT)

PARAMETER

(INPUT)

UNIT

†

= MIN to MAX

SN54AS573A

SN74AS573A

MIN

3

MAX

11

8

MIN

3

MAX

8

t

PLH

PHL

PLH

PHL

PZH

PZL

PHZ

PLZ

D

ns

Q

3

7

6

16.5

9

6

13

7.5

6.5

9.5

6.5

7

LE

4

2

8

2

OE

4

11

8

4

2

8

2

†

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

PARAMETER MEASUREMENT INFORMATION

SERIES 54ALS/74ALS AND 54AS/74AS DEVICES

7 V

R

= R1 = R2

V

CC

L

S1

R1

R

L

Test

Point

From Output

Under Test

From Output

Under Test

Test

Point

Test

Point

From Output

Under Test

C

L

R

L

R2

L

C

L

(see Note A)

LOAD CIRCUIT FOR

BI-STATE

TOTEM-POLE OUTPUTS

LOAD CIRCUIT

FOR OPEN-COLLECTOR OUTPUTS

LOAD CIRCUIT

FOR 3-STATE OUTPUTS

3.5 V

Timing

Input

High-Level

1.3 V

Pulse

0.3 V

t

h

t

w

t

su

3.5 V

0.3 V

Data

Input

Low-Level

1.3 V

Pulse

0.3 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PULSE DURATIONS

3.5 V

0.3 V

Output

Control

(low-level

enabling)

1.3 V

3.5 V

t

PZL

Input

1.3 V

t

PLZ

0.3 V

PHL

3.5 V

t

Waveform 1

S1 Closed

(see Note B)

t

PLH

1.3 V

V

OH

In-Phase

Output

1.3 V

V

OL

0.3 V

V

OL

t

PHZ

t

PLH

t

PZH

t

PHL

V

OH

V

Waveform 2

S1 Open

(see Note B)

OH

OL

Out-of-Phase

Output

(see Note C)

1.3 V

0.3 V

V

0 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

NOTES: A.

C includes probe and jig capacitance.

L

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. When measuring propagation delay items of 3-state outputs, switch S1 is open.

D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.

r

f

E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

28-Feb-2005

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

LCCC

CDIP

CFP

Drawing

84012012A

8401201RA

ACTIVE

OBSOLETE

ACTIVE

FK

J

20

1

None

Call TI

Level-NC-NC-NC

Call TI

8401201SA

W

FK

J

JM38510/38201B2A

JM38510/38201BRA

SN54ALS573CJ

SN54AS573AJ

LCCC

CDIP

SSOP

J

SN74ALS573CDBLE

SN74ALS573CDBR

DB

2000

25

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SN74ALS573CDW

SN74ALS573CDWR

SN74ALS573CN

ACTIVE

SOIC

PDIP

DW

N

20

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

2000

20

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SN74ALS573CN3

OBSOLETE

ACTIVE

PDIP

SO

N

20

None

Call TI

SN74ALS573CNSR

NS

2000

25

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SN74AS573ADW

SN74AS573ADWR

SN74AS573AN

ACTIVE

SOIC

PDIP

DW

N

20

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

2000

20

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SN74AS573AN3

SNJ54ALS573CFK

SNJ54ALS573CJ

SNJ54ALS573CW

SNJ54AS573AFK

SNJ54AS573AJ

OBSOLETE

ACTIVE

PDIP

LCCC

CDIP

CFP

N

FK

J

20

None

Call TI

1

Level-NC-NC-NC

Call TI

ACTIVE

W

FK

J

OBSOLETE

ACTIVE

LCCC

CDIP

1

Level-NC-NC-NC

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

28-Feb-2005

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

IMPORTANT NOTICE

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enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

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Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

型号:	74ALS573BD
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	PHILIPS SEMICONDUCTORS
包装说明：	SOP, SOP20,.4
Reach Compliance Code：	unknown
风险等级：	5.75
Is Samacsys：	N
JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e0
逻辑集成电路类型：	D LATCH
最大I（ol）：	0.024 A
位数：	8
功能数量：	1
端子数量：	20
最高工作温度：	70 °C
最低工作温度：
输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP20,.4
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
电源：	5 V
最大电源电流（ICC）：	24 mA
Prop。Delay @ Nom-Sup：	10 ns
认证状态：	Not Qualified
子类别：	FF/Latches
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	TTL
温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
Base Number Matches：	1

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