AD1981B
SPECIFICATIONS
(continued)
Parameter
CLOCK SPECIFICATIONS
1
Input Clock Frequency
Recommended Clock Duty Cycle
NOTES
1
Guaranteed but not tested.
2
Measurements reflect main ADC.
Specifications subject to change without notice.
Min
Typ
24.576
50
Max
Unit
MHz
%
40
60
Parameter
POWER-DOWN STATES*
(Fully Active)
ADC
DAC
ADC + DAC
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Standby
Headphone Standby
*Values
presented with V
REFOUT
not loaded.
Specifications subject to change without notice.
Set Bits
(No Bits Value)
PR0
PR1
PR1, PR0
PR2
PR2, PR0
PR2, PR1
PR2, PR1, PR0
PR5, PR4, PR3, PR2, PR1, PR0
PR6
DV
DD
Typ
42
36
29
12
42
36
29
12
0
42
AV
DD
Typ
51
45
35
28
24
18
9
1.5
0
44
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
TIMING PARAMETERS
Parameter
(Guaranteed over Operating Temperature Range)
Symbol
t
RST_LOW
t
RST2CLK
t
SYNC_HIGH
t
SYNC_LOW
t
SYNC2CLK
t
CLK_PERIOD
t
CLK_HIGH
t
CLK_LOW
t
SYNC_PERIOD
t
SETUP
t
HOLD
t
RISECLK
t
FALLCLK
t
RISESYNC
t
FALLSYNC
t
RISEDIN
t
FALLDIN
t
RISEDOUT
t
FALLDOUT
t
S2_PDOWN
t
SETUP2RST
t
OFF
32.56
32.56
5
5
2
2
2
2
2
2
2
2
0
15
25
15
50
15
Min
162.8
1.3
19.5
162.8
12.288
81.4
750
42
38
48.0
20.8
2.5
4
4
4
4
4
4
4
4
±
1
2000
48.84
Typ
1.0
Max
Unit
ms
ns
ms
µs
ns
MHz
ppm
ns
ps
ns
ns
kHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
RESET Active Low Pulsewidth
RESET Inactive to BIT_CLK Start-Up Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Start-Up Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter
1, 2, 3
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET
(Applies to SYNC, SDATA_OUT)
Rising Edge of RESET to Hi-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid
6
6
6
6
6
6
6
6
1.0
NOTES
1
Guaranteed but not tested.
2
Output jitter is directly dependent on crystal input jitter.
3
Maximum jitter specification for noncrystal operation only. Crystal operation maximum is much lower.
Specifications subject to change without notice.
–4–
REV. B
AD [ ANALOG DEVICES ]
