AD202/AD204
AD246 Clock Driver.
The AD246 is a compact, inexpensive
clock driver that can be used to obtain the required clock from a
single 15 V supply. Alternatively, the circuit shown in Figure 4
(essentially an AD246) can be used. In either case, one clock
circuit can operate at least 32 AD204s at the rated minimum
supply voltage of 14.25 V and one additional isolator can be
operated for each 40 mV increase in supply voltage up to 15 V.
A supply bypass capacitor is included in the AD246, but if many
AD204s are operated from a single AD246, an external bypass
capacitor should be used with a value of at least 1
mF
for every
five isolators used. Place the capacitor as close as possible to the
clock driver.
15V
14
180pF
1
3
2
49.9k
12 9
8
7
4
C
RC
R
CD
4047B
Q
6
5
6
TELEDYNE
TSC426
10
2
4
1N914
7
5
1N914
3
CLK
OUT
+1 F
35V
CLK AND
PWR COM
100pF
2k
V
SIG
R
F
AD202
OR
AD204
V
O
R
(
1 + –––
)
R
F
G
R
G
V
O
= V
SIG
R
F
20k
Figure 6. Input Connections for Gain > 1
The noninverting circuit of Figures 5 and 6 can also be used to
your advantage when a signal inversion is needed: just interchange
either the input leads or the output leads to get inversion. This
approach retains the high input resistance of the noninverting
circuit, and at unity gain no gain-setting resistors are needed.
When the isolator is not powered, a negative input voltage of
more than about 2 V will cause an input current to flow. If the
signal source can supply more than a few mA under such con-
ditions, the 2 kW resistor shown in series with IN+ should be
used to limit current to a safe value. This is particularly impor-
tant with the AD202, which may not start if a large input current
is present.
Figure 7 shows how to accommodate current inputs or sum
currents or voltages. This circuit can also be used when the
input signal is larger than the
±
5 V input range of the isolator;
for example, a
±
50 V input span can be accommodated with
R
F
= 20 kW and R
S
= 200 kW. Once again, a capacitor from FB
to IN COM is required for gains above five.
I
S
R
F
Figure 4. Clock Driver
Input Configurations.
The AD202 and AD204 have been
designed to be very easy to use in a wide range of applications.
The basic connection for standard unity gain applications, useful
for signals up to
±
5 V, is shown in Figure 5; some of the possible
variations are described below. When smaller signals must be
handled, Figure 6 shows how to achieve gain while preserving a
very high input resistance. The value of feedback resistor R
F
should be kept above 20 kW for best results. Whenever a gain of
more than five is taken, a 100 pF capacitor from FB to IN COM
is required. At lower gains this capacitor is unnecessary, but it
will not adversely affect performance if used.
FB
2k
(SEE TEXT)
V
SIG
( 5V)
IN–
IN+
OUT
LO
V
OUT
5V
OUT
HI
R
S2
V
S2
R
S1
V
S1
AD202
OR
AD204
V
IN COM
R
F
R
F
V = – V
S1
––– + V
S2
––– + I
S
R
F
+ ...
R
S1
R
S2
R
F
20k
(
)
AD202
OR
AD204
15V OR
CLOCK
Figure 7. Connections for Summing or Current Inputs
Figure 5. Basic Unity-Gain Application
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
REV. D
–5–
AD [ ANALOG DEVICES ]
