AD202/AD204
180
160
140
CMR – dB
G = 100
G=1
R
L
O
=0
120
100
80
60
R
L
O
= 50
0
R
L
O
O
=0
= 10
k
O
R
L
Except at the highest useful gains, the noise seen at the output
of the AD202 and AD204 will be almost entirely comprised of
carrier ripple at multiples of 25 kHz. The ripple is typically
2 mV p-p near zero output and increases to about 7 mV p-p for
outputs of
±
5 V (1 MHz measurement bandwidth). Adding a
capacitor across the output will reduce ripple at the expense of
bandwidth: for example, 0.05
mF
at the output of the AD204
will result in 1.5 mV ripple at
±
5 V, but signal bandwidth will
be down to 1 kHz.
When the full isolator bandwidth is needed, the simple two-pole
active filter shown in Figure 13 can be used. It will reduce ripple
to 0.1 mV p-p with no loss of signal bandwidth, and also serves
as an output buffer.
R
L
= 10
k
40
10
20
50 60 100
200
500
FREQUENCY – Hz
1k
2k
5k
Figure 10b. AD202
Dynamics and Noise.
Frequency response plots for the AD202
and AD204 are given in Figure 11. Since neither isolator is slew-
rate limited, the plots apply for both large and small signals.
Capacitive loads of up to 470 pF will not materially affect fre-
quency response. When large signals beyond a few hundred Hz
will be present, it is advisable to bypass –V
ISO
and +V
ISO
to IN
COM with 1
mF
tantalum capacitors even if the isolated supplies
are not loaded.
At 50 Hz/60 Hz, phase shift through the AD202/AD204 is typically
0.8∞ (lagging). Typical unit to unit variation is
±0.2∞
(lagging).
60
AD204
AD202
40
An output buffer or filter may sometimes show output spikes
that do not appear at its input. This is usually due to clock noise
appearing at the op amp’s supply pins (since most op amps have
little or no supply rejection at high frequencies). Another com-
mon source of carrier-related noise is the sharing of a ground
track by both the output circuit and the power input. Figure 13
shows how to avoid these problems: the clock/supply port of the
isolator does not share ground or 15 V tracks with any signal
circuits, and the op amp’s supply pins are bypassed to signal
common (note that the grounded filter capacitor goes here as
well). Ideally, the output signal LO lead and the supply com-
mon meet where the isolator output is actually measured, e.g.,
at an A/D converter input. If that point is more than a few feet
from the isolator, it may be useful to bypass output LO to sup-
ply common at the isolator with a 0.1
mF
capacitor.
In applications where more than a few AD204s are driven by a
single clock driver, substantial current spikes will flow in the
power return line and in whichever signal out lead returns to a
low impedance point (usually output LO). Both of these tracks
should be made large to minimize inductance and resistance;
ideally, output LO should be directly connected to a ground
plane which serves as measurement common.
Current spikes can be greatly reduced by connecting a small
inductance (68
mH–100 mH)
in series with the clock pin of each
AD204. Molded chokes such as the Dale IM-2 series, with dc
resistance of about 5
W,
are suitable.
V
O
/V
I
– dB
20
AMPLITUDE
RESPONSE
0
PHASE
RESPONSE
(G = 1)
0
–20
–50
–40
10
20
50
100
200
500 1k
FREQUENCY – Hz
2k
5k
10k
–100
20k
Figure 11. Frequency Response at Several Gains
PHASE DEGREES
2200pF
10k
10k
AD711
POINT OF
MEASUREMENT
The step response of the AD204 for very fast input signals can
be improved by the use of an input filter, as shown in Figure 12.
The filter limits the bandwidth of the input (to about 5.3 kHz)
so that the isolator does not see fast, out-of-band input terms
that can cause small amounts (± 0.3%) of internal ringing. The
AD204 will then settle to
±
0.1% in about 300
ms
for a 10 V
step.
AD204
3.3k
V
S
0.01 F
+
1000pF
+
1.0 F 1.0 F
AD202
OR
AD204
AD246
(IF USED)
–15V
+15V
C
POWER
SUPPLY
Figure 13. Output Filter Circuit Showing Proper Grounding
Figure 12. Input Filter for Improved Step Response
(NOTE: Circuit figures shown on this page are for SIP-style packages. Refer to
Page 3 for proper DIP package pinout.)
REV. D
–7–
AD [ ANALOG DEVICES ]
