Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C unless otherwise noted.
Transient currents of up to 100 mA do not cause SCR latch-up.
Table 5.
Parameter
AV
DD
to AGND, DGND
DV
CC
to AGND, DGND
Digital Inputs to AGND, DGND
Digital Outputs to AGND, DGND
REFIN/REFOUT to AGND, DGND
I
OUT
to AGND, DGND
AGND to DGND
Operating Temperature Range
Industrial
Storage Temperature Range
Junction Temperature (T
J
max)
24-Lead TSSOP Package
θ
JA
Thermal Impedance
40-Lead LFCSP Package
θ
JA
Thermal Impedance
Power Dissipation
Lead Temperature
Soldering
Rating
−0.3V to 60V
−0.3 V to +7 V
−0.3 V to DV
CC
+ 0.3 V or 7 V
(whichever is less)
−0.3 V to DV
CC
+ 0.3 V or 7V
(whichever is less)
−0.3 V to +7 V
−0.3V to AV
DD
-0.3V to +0.3V
−40°C to +85
1
°C
−65°C to +150°C
125°C
42°C/W
28°C/W
(T
J
max – T
A
)/ θ
JA
JEDEC Industry Standard
J-STD-020
1
AD5410/AD5420
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Power dissipated on chip must be de-rated to keep junction temperature
below 125°C. Assumption is max power dissipation condition is sourcing
24mA into Ground from AV
DD
with a 3mA on-chip current.
Rev. PrE | Page 9 of 30