AD633
+15V
0.1 F
E
R
1
2
3
4
R
10k
+15V
W=
R2
3k
E
2
10V
E
+15
R
10k
0.1 F
0.1 F
E
X
1
2
X1
X2
Y1
Y2
+V
S 8
W
7
Z
6
–V
S 5
0.1 F
–15V
R1
1k
X1
X2
Y1
Y2
+V
S 8
W
7
AD633JN
C
AD633JN
AD711
0.1 F
–15
3
4
1N4148
Z
6
0.1 F
–V
S 5
–15V
W = –10V
E
E
X
Figure 5. ”Bounceless” Frequency Doubler
At
ω
o
= 1/CR, the X input leads the input signal by 45° (and is
attenuated by
√2),
and the Y input lags the X input by 45° (and
is also attenuated by
√2).
Since the X and Y inputs are 90° out of
phase, the response of the circuit will be (satisfying Equation 3):
W
=
Figure 7. Connections for Division
(
1
10
V
)
E
(
sin
ω
t
+
45
°
)
2
o
o
E
2
(
sin
ω
t
−
45
°
)
o
Likewise, Figure 7 shows how to implement a divider using a
multiplier in a feedback loop. The transfer function for the
divider is
W
= −
10
V
(
=
(
40
V
)
E
2
(
sin 2
ω
t
)
(Equation 4)
)
EE
(Equation 6)
+15V
0.1 F
X
which has no dc component. Resistors R1 and R2 are included to
restore the output amplitude to 10 V for an input amplitude of 10 V.
The amplitude of the output is only a weak function of fre-
quency: the output amplitude will be 0.5% too low at
ω
=
0.9
ω
o
, and
ω
o
= 1.1
ω
o
.
Generating Inverse Functions
X
INPUT
1
2
X1
X2
Y1
Y2
+V
S 8
W
7
R1
R2
Z
6
–V
S 5
0.1 F
–15V
S
W=
(X
1
– X
2
) (Y
1
– Y
2
)
10V
1k
R1, R2
(R1 + R2)
R1
100k
+S
AD633JN
Y
INPUT
3
4
Inverse functions of multiplication, such as division and square
rooting, can be implemented by placing a multiplier in the feed-
back loop of an op amp. Figure 6 shows how to implement a
square rooter with the transfer function
W
=
−
10
V E
Figure 8. Connections for Variable Scale Factor
Variable Scale Factor
(
)
(Equation 5)
for the condition E<0.
R
10k
+15V
+15
R
10k
E
0.1 F
0.1 F
1
2
In some instances, it may be desirable to use a scaling voltage
other than 10 V. The connections shown in Figure 8 increase
the gain of the system by the ratio (R1 + R2)/R1. This ratio is
limited to 100 in practical applications. The summing input, S,
may be used to add an additional signal to the output or it may
be grounded.
Current Output
X1
X2
Y1
Y2
+V
S 8
W
7
1N4148
Z
6
0.1 F
–V
S 5
–15V
W=
–(10V)E
The AD633’s voltage output can be converted to a current
output by the addition of a resistor R between the AD633’s W
and Z pins as shown in Figure 9 below. This arrangement forms
+15V
0.1 F
X
INPUT
1
2
3
4
AD633JN
AD711
0.1 F
–15
3
4
X1
X2
Y1
Y2
+V
S 8
W
7
Z
6
–V
S 5
0.1 F
–15V
R
I
O
=
1
R
1k
(X
1
– X
2
) (Y
1
– Y
2
)
10V
R
100k
AD633JN
Y
INPUT
Figure 6. Connections for Square Rooting
Figure 9. Current Output Connections
–4–
REV. B
AD [ ANALOG DEVICES ]
