AD8842
Table I. Serial Input Decode Table
LAST
LSB
D0
D1
D2
D3
D4
D5
D6
MSB LSB
D7 A0
A1
A2
FIRST
MSB
A3
DATA
ADDRESS
MSB
A3
0
0
0
0
0
A2
0
0
0
0
1
A1
0
0
1
1
0
LSB
A0
0
1
0
1
0
DAC UPDATED
NO OPERATION
DAC A
DAC B
DAC C
DAC D
•
•
•
•
•
•
1
1
0
0
0
0
0
1
DAC H
NO OPERATION
1
1
1
1
NO OPERATION
MSB
D7
0
0
D6
0
0
D5
0
0
D4
0
0
D3
0
0
D2
0
0
D1
0
0
LSB
D0
0
1
DAC OUTPUT VOLTAGE
V
OUT
= (D/128 –1) x V
IN
–V
IN
(1/128–1) x V
IN
•
•
•
0
1
1
1
0
0
1
0
0
1
0
0
•
•
•
1
0
0
1
0
0
1
0
0
1
0
1
(127/128–1) x V
IN
(128/128–1) x V
IN
= 0V; (PRESET VALUE)
(129/128–1) x V
IN
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
(254/128–1) x V
IN
(255/128–1) x V
IN
≈
V
IN
Table II. Input Logic Control Truth Table
CLK
L
↑
X
X
X
LD
L
L
L
Η
H
PR
H
H
L
H
X
Input Shift Register Operation
No Operation
Shift One Bit in from SDI (Pin 20), Shift One Bit* Out from SDO (Pin 18)
All DAC Registers = 80
H
Load Serial Register Data into DAC(X) Register
Serial Data Input Register Loading Disabled
*Data shifted into the SDI pin appears twelve clocks later at the SDO pin.
REV. 0
–5–