AD96685/AD96687–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(Positive Supply Voltage = 5.0 V; Negative Supply Voltage = –5.2 V, unless otherwise noted.)
Industrial Temperature Range –25 C to +85 C
Parameter
INPUT CHARACTERISTICS
Input Offset Voltage
Input Offset Drift
Input Bias Current
Input Offset Current
Input Resistance
Input Capacitance
Input Voltage Ranges
2
Common-Mode Rejection Ratio
ENABLE INPUT
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
DIGITAL OUTPUTS
3
Logic “1” Voltage
Logic “0” Voltage
SWITCHING PERFORMANCES
Propagation Delays
4
Input to Output HIGH
Input to Output LOW
Latch Enable to Output HIGH
Latch Enable to Output LOW
Dispersions
5
Latch Enable
Minimum Pulsewidth
Minimum Setup Time
Minimum Hold Time
POWER SUPPLY
6
Positive Supply Current (+5.0 V)
Negative Supply Current (–5.2 V)
Power Supply Rejection Ratio
7
Temp
25°C
Full
Full
25°C
Full
25°C
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Test
Level
I
VI
V
I
VI
I
VI
V
V
VI
VI
VI
VI
VI
VI
VI
VI
Min
AD96685BR
Typ
Max
1
20
7
0.1
200
2
–2.5
80
–1.1
–1.5
40
5
–1.1
–1.5
–1.1
–1.5
+5.0
90
–2.5
80
–1.1
–1.5
40
5
2
3
10
13
1.0
1.2
AD96687BQ/BP/BR
Min
Typ
Max
1
20
7
0.1
200
2
+5.0
90
2
3
10
13
1.0
1.2
Unit
mV
mV
µV/°C
µA
µA
µA
µA
kΩ
pF
V
dB
V
V
µA
µA
V
V
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
Full
Full
IV
IV
IV
IV
V
IV
IV
IV
VI
VI
VI
2.5
2.5
2.5
2.5
50
2.0
0.5
0.5
8
15
70
3.5
3.5
3.5
3.5
3.0
1.0
1.0
9
18
60
2.5
2.5
2.5
2.5
50
2.0
0.5
0.5
15
31
70
3.5
3.5
3.5
3.5
3.0
1.0
1.0
18
36
ns
ns
ns
ns
ps
ns
ns
ns
mA
mA
dB
60
NOTES
1
R
S
= 100
Ω.
2
Input Voltage Range can be extended to –3.3 V if –V
S
= –6.0 V.
3
Outputs terminated through 50
Ω
to –2.0 V.
4
Propagation delays measured with 100 mV pulse (10 mV overdrive) to 50% transition point of the output.
5
Change in propagation delay from 100 mV to 1 V input overdrive.
6
Supply voltages should remain stable within
±
5% for normal operation.
7
Measured at
±
5% of +V
S
and –V
S
.
Specifications subject to change without notice.
LATCH
ENABLE
COMPARE
LATCH
50%
t
S
t
H
V
DD
V
IN
t
S
t
H
t
PD
– Minimum Setup Time
– Minimum Hold Time
– Input to Output Delay
DIFFERENTIAL
INPUT
VOLTAGE
t
PW
(E)
V
OS
Q
t
PD
t
PD
(E)
50%
t
PD
(E) – LATCH ENABLE to Output Delay
t
PW
(E) – Minimum LATCH ENABLE Pulsewidth
V
OS
– Input Offset Voltage
– Overdrive Voltage
Q
50%
V
OD
Figure 1. System Timing Diagram
–2–
REV. D
AD [ ANALOG DEVICES ]
