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EVAL-ADCMP552BRQZ 参数 Datasheet PDF下载

EVAL-ADCMP552BRQZ图片预览
型号: EVAL-ADCMP552BRQZ
PDF下载: 下载PDF文件 查看货源
内容描述: 单电源高速PECL / LVPECL比较 [Single Supply High Speed PECL/LVPECL Comparators]
分类和应用:
文件页数/大小: 16 页 / 259 K
品牌: ADI [ ADI ]
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Data Sheet  
ADCMP551/ADCMP552/ADCMP553  
Pin No.  
ADCMP551 ADCMP552 ADCMP553 Mnemonic Function  
12  
15  
LEB  
One of Two Complementary Inputs for Channel B Latch Enable. In the compare  
mode (logic low), the output tracks changes at the input of the comparator. In  
the latch mode (logic high), the output reflects the input state just prior to the  
comparator’s being placed in the latch mode. LEB must be driven in conjunction  
with LEB.  
13  
16  
LEB  
One of Two Complementary Inputs for Channel B Latch Enable. In the compare  
mode (logic low), the output tracks changes at the input of the comparator. In  
the latch mode (logic high), the output reflects the input state just prior to the  
comparator’s being placed in the latch mode. LEB must be driven in conjunction  
with LEB.  
15  
16  
18  
19  
QB  
QB  
VCC  
One of Two Complementary Outputs for Channel B. QB is logic low if the analog  
voltage at the noninverting input is greater than the analog voltage at the  
inverting input (provided the comparator is in the compare mode). See the  
description of Pin LEB for more information.  
One of Two Complementary Outputs for Channel B. QB is logic high if the analog  
voltage at the noninverting input is greater than the analog voltage at the  
inverting input (provided the comparator is in the compare mode). See the  
description of Pin LEB for more information.  
7
Positive Supply Terminal.  
Rev. A | Page 7 of 16