Data Sheet
ADXL350
If other devices are connected to the same I2C bus, the nominal
operating voltage level of these other devices cannot exceed VDD I/O
by more than 0.3 V. External pull-up resistors, RP, are necessary
for proper I2C operation. Refer to the UM10204 I2C-Bus
Specification and User Manual, Rev. 03—19 June 2007, when
selecting pull-up resistor values to ensure proper operation.
I2C
tied high to VDD I/O, the ADXL350 is in I2C mode,
CS
With
requiring a simple 2-wire connection as shown in Figure 55.
The ADXL350 conforms to the UM10204 I2C-Bus Specification
and User Manual, Rev. 03—19 June 2007, available from NXP
Semiconductor. It supports standard (100 kHz) and fast (400 kHz)
data transfer modes if the timing parameters given in Table 12
and Figure 57 are met.
Table 11. I2C Digital Input/Output Voltage
Parameter
Limit1
Unit
Digital Input Voltage
Single-byte or multiple-byte reads/writes are supported,
as shown in Figure 56. With the SDO/ALT ADDRESS pin
(Pin 7) high, the 7-bit I2C address for the device is 0x1D, followed
Low Level Input Voltage (VIL)
High Level Input Voltage (VIH)
Digital Output Voltage
Low Level Output Voltage (VOL)2
0.25 × VDD I/O V max
0.75 × VDD I/O V min
W
by the R/ bit. This translates to 0x3A for a write and 0x3B for a
2
0.2 × VDD I/O
V max
W
read. An alternate I C address of 0x53 (followed by the R/ bit)
can be chosen by grounding the SDO/ALT ADDRESS pin
(Pin 7). This translates to 0xA6 for a write and 0xA7 for a read.
1 Limits are based on characterization results; not production tested.
2 The limit given is only for VDD I/O < 2 V. When VDD I/O > 2 V, the limit is 0.4 V maximum.
V
DD I/O
R
R
P
ADXL350
ADXL350
PROCESSOR
P
CS
SDA
D IN/OUT
D OUT
ALT ADDRESS
SCL
Figure 55. I2C Connection Diagram (Address 0x53)
SINGLE-BYTE WRITE
MASTER START
SLAVE
SLAVE ADDRESS + WRITE
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
DATA
DATA
STOP
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
MULTIPLE-BYTE WRITE
MASTER START
SLAVE
SLAVE ADDRESS + WRITE
DATA
STOP
ACK
SINGLE-BYTE READ
MASTER START
SLAVE
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
START1
START1
SLAVE ADDRESS + READ
SLAVE ADDRESS + READ
NACK
STOP
ACK
DATA
DATA
MULTIPLE-BYTE READ
MASTER START
SLAVE
ACK
NACK
STOP
ACK
DATA
NOTES
1. THIS START IS EITHER A RESTART OR A STOP FOLLOWED BY A START.
2. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING.
Figure 56. I2C Device Addressing
Rev. 0 | Page 19 of 36