AD6311
1/8- to 1/16 Duty VFD Controller/Driver
Lower 4 bits
Higher 4 bits
Only the lower 4 bits of the addresses assigned to Seg
17
through Seg
20
are valid, and the higher 4 bits
are ignored.
3.0 LED Port
Data is written to the LED port by a write command, starting from the least significant bit of the port.
When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off . The data
of bits 6 through 8 is ignored.
MSB
-
-
-
LSB
b4 b3 b2 b1 b0
LED1
Don't care
LED2
LED3
LED4
LED5
On power application, all the LEDs remain dark.
4.0 Key Matrix and Key-Input data Storage RAM
The key matrix is of 12×4 configuration, as shown below.
KEY
1
KEY
2
KEY
3
KEY
4
Seg
1
/KS
1
Seg
2
/KS
2
Seg
3
/KS
3
Seg
4
/KS
4
Seg
5
/KS
5
Seg
6
/KS
6
Seg
7
/KS
7
Seg
8
/KS
8
Seg
9
/KS
9
Seg
10
/KS
10
Seg
11
/KS
11
The data of each key is stored as illustrated below, and is read by a read command, starting from the least
significant bit. When the most significant bit of data (Seg
12
b
7
) has been read, the least significant bit of the
next data (Seg
1
b
0
) is read.
KEY1
...
KEY4
KEY1
...
KEY4
Seg
1
/KS
1
Seg
3
/KS
3
Seg
5
/KS
5
Seg
7
/KS
7
Seg
9
/KS
9
Seg
11
/KS
11
b0--------b3
Anachip Corp.
www.anachip.com.tw
Seg
2
/KS
2
Seg
4
/KS
4
Seg
6
/KS
6
Seg
8
/KS
8
Seg
10
/KS
10
Seg
12
/KS
12
b4--------b7
Reading sequence
Seg
12/
KS
12
Rev. A5 Dec 29, 2003
7/11
ANACHIP [ ANACHIP CORP ]
