LRCK
t
BCH
BCK
t
BCY
DATA
t
DS
t
DH
t
BL
t
BCL
t
LB
50% of V
DD
50% of V
DD
50% of V
DD
SYMBOL
t
BCY
t
BCH
t
BCL
t
BL
t
LB
t
DS
t
DH
PARAMETER
BCK Pulse Cycle Time
BCK High Level Time
BCK Low Level Time
BCK Rising Edge to LRCK Edge
LRCK Falling Edge to BCK Rising Edge
DATA Set Up Time
DATA Hold Time
MIN
35
35
10
10
10
10
MAX
32, 48, or 64f
S
(1)
UNITS
ns
ns
ns
ns
ns
ns
NOTE: (1) f
S
is the sampling frequency (e.g., 44.1kHz, 48kHz, 96kHz, etc.)
FIGURE 4. Audio Interface Timing.
SERIAL CONTROL INTERFACE
The serial control interface is a 3-wire serial port that
operates asynchronously to the serial audio interface. The
serial control interface is utilized to program the on-chip
mode registers. The control interface includes MD (pin 13),
MC (pin 14), and ML (pin 15). MD is the serial data input,
used to program the mode registers, MC is the serial bit
clock, used to shift data into the control port, and ML is the
control port latch clock.
REGISTER WRITE OPERATION
All write operations for the serial control port use 16-bit data
words. Figure 5 shows the control data word format. The
most significant bit must be a “0”. There are seven bits,
labeled IDX[6:0], that set the register index (or address) for
the write operation. The least significant eight bits, D[7:0],
contain the data to be written to the register specified by
IDX[6:0].
Figure 6 shows the functional timing diagram for writing the
serial control port. ML is held at a logic “1 ” state until a
register needs to be written. To start the register write cycle,
ML is set to logic “0”. Sixteen clocks are then provided on
MC, corresponding to the 16 bits of the control data word on
MD. After the sixteenth clock cycle has completed, ML is set
to logic “1” to latch the data into the indexed mode control
register.
CONTROL INTERFACE TIMING REQUIREMENTS
See Figure 7 for a detailed timing diagram of the serial
control interface. These timing parameters are critical for
proper control port operation.
MSB
0
IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0
D7
D6
D5
D4
D3
D2
D1
LSB
D0
Register Index (or Address)
Register Data
FIGURE 5. Control Data Word Format for MDI.
ML
MC
MD
X
0
IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 D7
D6
D5
D4
D3
D2
D1
D0
X
X
0
IDX6
FIGURE 6. Register Write Operation.
10
PCM1741
SBAS175
BURR-BROWN [ BURR-BROWN CORPORATION ]
