PCM1850
PCM1851
SLES108
−
MARCH 2004
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
BLOCK DIAGRAM
V
IN
L1
V
IN
L2
V
IN
L3
V
IN
L4
V
IN
L5
V
IN
L6
MOUTL
V
REF
1
V
REF
S
V
REF
2
V
IN
R1
V
IN
R2
V
IN
R3
V
IN
R4
V
IN
R5
V
IN
R6
MOUTR
Reference
Single-Ended
MUX and PGA
Delta-Sigma
Modulator
BCK
LRCK
DOUT
Audio
Data
Interface
Decimation
Filter
with
High-Pass Filter
OVER
Control
Data
Interface
MS (ADR)
(1)
MD (SDA)
(1)
MC (SCL)
(1)
TEST0
TEST1
Single-Ended
MUX and PGA
Delta-Sigma
Modulator
Power Supply
Clock and Timing Control
RST
SCKI
V
CC
(1)
AGND DGND
V
DD
PCM1850 (PCM1851)
PIN ASSIGNMENTS
PCM1850
(TOP VIEW)
PCM1851
(TOP VIEW)
V
IN
R6
V
IN
L6
V
IN
R5
V
IN
L5
V
IN
R4
V
IN
L4
V
IN
R3
V
IN
L3
24 23 22 21 20 19 18 17
V
REF
S
V
REF
1
V
REF
2
V
cc
AGND
MS
MC
MD
25
26
27
28
29
30
31
32
1
2 3 4
5 6 7 8
16
15
14
13
12
11
10
9
V
IN
R2
V
IN
L2
V
IN
R1
V
IN
L1
MOUTL
MOUTR
RST
TEST1
V
REF
S
V
REF
1
V
REF
2
V
cc
AGND
ADR
SCL
SDA
V
IN
R6
V
IN
L6
V
IN
R5
V
IN
L5
V
IN
R4
V
IN
L4
V
IN
R3
V
IN
L3
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
1 2
3 4 5 6
7 8
16
15
14
13
12
11
10
9
V
IN
R2
V
IN
L2
V
IN
R1
V
IN
L1
MOUTL
MOUTR
RST
TEST1
LRCK
BCK
DOUT
OVER
DGND
V
DD
SCKI
TEST0
2
LRCK
BCK
DOUT
OVER
DGND
V
DD
SCKI
TEST0