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PCM1850
PCM1851
SLES108
−
MARCH 2004
ABSOLUTE MAXIMUM RATINGS
Supply voltage: V
CC
Supply voltage: V
DD
Ground voltage differences: AGND, DGND
over operating free-air temperature range unless otherwise noted
–0.3 V to 6.5 V
–0.3 V to 4 V
±0.1
V
–0.3 V to (V
DD
+ 0.3 V) < 4 V
–0.3 V to 6.5 V
–3 V to (V
CC
+ 3 V) < 9 V
–0.3 V to (V
CC
+ 0.3 V) < 6.5 V
±10
mA
–40°C to 125°C
–55°C to 150°C
150°C
260°C, 5 s
260°C
Digital input voltage: LRCK, BCK, DOUT, OVER
Digital input voltage: RST, SCKI, MS (ADR)
, MC (SCL)
, MD (SDA)
, TEST0, TEST1
Analog input voltage: V
IN
L1–6, V
IN
R1–6
Analog input voltage: MOUTL, MOUTR, V
REF
1, V
REF
2, V
REF
S
Input current (any pins except supplies)
Ambient temperature under bias
Storage temperature
Junction temperature
Lead temperature (soldering)
Package temperature (IR reflow, peak)
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
PCM1850 (PCM1851)
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= 25°C, V
CC
= 5 V, V
DD
= 3.3 V, master mode, f
S
= 48 kHz, system clock = 256 f
S
, 24-bit data, unless otherwise noted
PARAMETER
DIGITAL INPUT/OUTPUT
DATA FORMAT
Audio data interface format
Audio data bit length
Audio data format
f
S
Sampling frequency
256 f
S
System clock frequency
384 f
S
512 f
S
768 f
S
INPUT LOGIC
V
IH (1)
V
IL (1)
V
IH (2) (3)
V
IL (2) (3)
I
IH (2)
I
IL (2)
I
IH (1) (3)
I
IL (1) (3)
(1)
(2)
TEST CONDITIONS
PCM1850PJT PCM1851PJT
,
MIN
TYP
MAX
UNIT
Left-justified, I
2
S, right-justified
16, 24
MSB-first, 2s complement
16
4.096
6.144
8.192
12.288
2
48
12.288
18.432
24.576
36.864
96
24.576
36.864
49.152
—
V
DD
0.8
5.5
0.8
±10
±10
65
100
±10
µA
A
VDC
MHz
kHz
bits
Input logic level
0
2
0
V
IN
= V
DD
V
IN
= 0
V
IN
= V
DD
V
IN
= 0
Input logic current
Pins 1, 2: LRCK, BCK (In slave mode, Schmitt-trigger input, with 50-kΩ typical pulldown resistor)
Pins 7, 31, 32: SCKI, MC/SCL (PCM1850/1851), MD/SDA (PCM1850/1851) (Schmitt-trigger input, 5-V tolerant)
(3)
Pins 8–10, 30: TEST0, TEST1, RST, MS/ADR (PCM1850/1851) (Schmitt-trigger input, with 50-kΩ typical pulldown resistor, 5-V tolerant)
5