Preliminary Datasheet
2A CMOS LDO REGULATOR
AP2132B
Pin Configuration
MP Package
(PSOP-8)
8
GND
1
2
3
4
PG
EN
ADJ
VOUT
NC
7
6
5
VIN
VCTRL
Figure 2. Pin Configuration of AP2132B (Top View)
Pin Description
Pin
Number
1
Pin
Name
PG
Function
Assert high once VOUT reaches 92% of its rating voltage
2
3
4
5
6
EN
Enable input
Input voltage
VIN
VCTRL Input voltage for controlling circuit
NC
Not connected
Regulated output voltage
VOUT
Adjust output: when connected to ground, the output voltage is set by
internal resistors; when external feedback resistors are connected, the
output voltage will be VOUT=0.8(R1+R2)/R2
7
8
ADJ
GND
Ground
Oct. 2010 Rev. 1. 0
BCD Semiconductor Manufacturing Limited
2
BCDSEMI [ BCD SEMICONDUCTOR MANUFACTURING LIMITED ]
