CN8223
4.0 Electrical and Mechanical Specifications
ATM Transmitter/Receiver with UTOPIA Interface
4.3 Timing
Figure 4-1. Local Processor Interface Timing
t
prclk
t
t
prl
prh
PRCLK
CS
AS
~
~
Set Up
4 ns Min
and t
Hold
Hold tprh plus
2 ns Min
8 ns Min
(t
)
cspr
(t
)
aspr
csph
(t
)
pras
W/R
~
Invalid
– 4 ns
t
prl
VALID
A[7:1]
Hold
Set Up
8 ns Min
1 ns Min
(t and t
)
wpr
apr
Hold
5 ns Min
D[15:0]
VALID
Hold
(Read Operation)
Hold
11 ns Max
(t and t
3.2 ns Min
(t and t
)
pdi
pdz
)
pdv
pdd
OE
~
Invalid 4.9 ns Max
odi
(t and t
)
odz
Valid 6 ns. Max
(t and t
)
odv
odd
D[15:0]
(Write Operation)
VALID
Address Latched
in CN8223
Set Up
1 ns Min
Hold
(t
)
3 ns Min
dpr
(t
)
prd
100046C
Conexant
4-5
CONEXANT [ CONEXANT SYSTEMS, INC ]
