Bt8370/8375/8376
3.7 Receive LIU Registers
Fully Integrated T1/E1 Framer and Line Interface
021—Receive LIU Status (RSTAT)
7
6
5
4
3
2
1
0
JMPTY
CPDERR
ZCSUB
EXZ
BPV
—
EYEOPEN
PRE_EQ
CPDERR
CLAD Phase Detector Error—Indicates the CLAD phase detector has lost lock with respect to
the selected CLADI reference clock.
JMPTY
JAT Empty/Full—Indicates whether the elastic store is within two unit intervals of being
empty or two unit intervals of being full. JMPTY is not updated (holds its prior value) until the
elastic store is within two unit intervals of its limit. The processor reads JMPTY and CPDERR
to determine what event caused JERR or CKERR [addr 006].
JMPTY
JERR
JAT Status
X
0
0
1
1
No error
JAT Overflow
JAT Underrun
1
ZCSUB
Zero Code Substitution—Indicates one or more B8ZS/HDB3 substitution patterns have been
detected on receiver input data, depending on T1/E1N [addr 001] line rate selection. ZCSUB is
reported, regardless of whether or not ZCS decoding is enabled [RAMI; addr 040]. ZCSUB is
latched active high upon detection of the first ZCS pattern, and the active high hold interval is
defined by LATCH_ERR [addr 046].
ZCSUB
T1/E1N
ZCSUB Status
No ZCS patterns detected
0
1
1
X
0
HDB3 pattern detected
B8ZS pattern detected
1
EXZ
Excessive Zeros—Reports one or more long strings of 0s detected on RTIP/RRING data
inputs. Depending on bits RZCS [addr 040] and T1/E1N [addr 001], occurrences of 8, 10, or
16 consecutive zeros are detected. EXZ is latched active high upon detection of the first error.
The active high hold interval is defined by LATCH_ERR [addr 046]. If EXZ_LCV [addr 045]
is enabled, EXZ errors are also accumulated in LCV count [addr 054, 055].
EXZ
T1/E1N
RZCS
EXZ Status
0
1
1
1
X
0
X
X
0
No error
10 consecutive 0s
16 consecutive 0s
8 consecutive 0s
1
1
1
3-40
Conexant
N8370DSE
CONEXANT [ CONEXANT SYSTEMS, INC ]
