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CY7C421-20JC 参数 Datasheet PDF下载

CY7C421-20JC图片预览
型号: CY7C421-20JC
PDF下载: 下载PDF文件 查看货源
内容描述: 五百一十二分之二百五十六/ 1K / 2K / 4K ×9异步FIFO [256/512/1K/2K/4K x 9 Asynchronous FIFO]
分类和应用: 存储内存集成电路先进先出芯片时钟
文件页数/大小: 17 页 / 607 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C419/21/25/29/33
Switching Characteristics
Over the Operating Range
Parameter
t
RC
t
A
t
RR
t
PR
t
LZR[6,9]
t
DVR[9,10]
t
HZR[6,9,10]
t
WC
t
PW
t
HWZ[6,9]
t
WR
t
SD
t
HD
t
MRSC
t
PMR
t
RMR
t
RPW
t
WPW
t
RTC
t
PRT
t
RTR
t
EFL
t
HFH
t
FFH
t
REF
t
RFF
t
WEF
t
WFF
t
WHF
t
RHF
t
RAE
t
RPE
t
WAF
t
WPF
t
XOL
t
XOH
Description
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
Read LOW to Low Z
Data Valid After Read HIGH
Read HIGH to High Z
Write Cycle Time
Write Pulse Width
Write HIGH to Low Z
Write Recovery Time
Data Set-Up Time
Data Hold Time
MR Cycle Time
MR Pulse Width
MR Recovery Time
Read HIGH to MR HIGH
Write HIGH to MR HIGH
Retransmit Cycle Time
Retransmit Pulse Width
Retransmit Recovery Time
MR to EF LOW
MR to HF HIGH
MR to FF HIGH
Read LOW to EF LOW
Read HIGH to FF HIGH
Write HIGH to EF HIGH
Write LOW to FF LOW
Write LOW to HF LOW
Read HIGH to HF HIGH
Effective Read from Write HIGH
Effective Read Pulse Width After EF HIGH
Effective Write from Read HIGH
Effective Write Pulse Width After FF HIGH
Expansion Out LOW Delay from Clock
Expansion Out HIGH Delay from Clock
–10
–15
–20
–25
Min
20
10
10
3
5
Max
10
Min
25
10
15
3
5
Max
15
Min
30
10
20
3
5
Max
20
Min
35
10
25
3
5
Max
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
20
10
5
10
6
0
20
10
10
10
10
20
10
10
20
20
20
10
10
10
10
10
10
10
10
10
10
10
10
15
15
25
15
5
10
8
0
25
15
10
15
15
25
15
10
15
30
20
5
10
12
0
30
20
10
20
20
30
20
10
25
25
25
15
15
15
15
15
15
15
20
15
20
15
15
15
35
25
5
10
15
0
35
25
10
25
25
35
25
10
30
30
30
20
20
20
20
20
20
20
25
20
25
20
20
18
35
35
35
25
25
25
25
25
25
25
25
25
25
Notes
7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V and output loading of the specified I
OL
/I
OH
and 30 pF load capacitance,
as in part (a) of AC Test Load and Waveforms, unless otherwise specified.
8. See the last page of this specification for Group A subgroup testing information.
9. t
HZR
transition is measured at +200 mV from V
OL
and –200 mV from V
OH
. t
DVR
transition is measured at the 1.5V level. t
HWZ
and t
LZR
transition is measured at
±100
mV from the steady state.
10. t
HZR
and t
DVR
use capacitance loading as in part (b) of AC Test Load and Waveforms.
Document #: 38-06001 Rev. *C
Page 5 of 17