SL811HS
PLL Clock Generator
Either a 12 MHz or a 48 MHz external crystal is used with the
SL811HS
. Two pins, X1 and X2, are provided to connect a low
cost crystal circuit to the device as shown in
and
Use an external clock source if available in the appli-
cation instead of the crystal circuit by connecting the source
directly to the X1 input pin. When a clock is used, the X2 pin is
not connected.
When the CM pin is tied to a logic 0, the internal PLL is bypassed
so the clock source must meet the timing requirements specified
by the USB specification.
Figure 2. Full Speed 48 MHz Crystal Circuit
Figure 3. Optional 12 MHz Crystal Circuit
X1
X2
Rf
1M
Rs
100
X1
12 MHz , series, 20-pF load
X1
X2
Cin
22 pF
Cout
22 pF
Rf
1M
Rs
X1
48 MHz, series, 20-pF load
100
Typical Crystal Requirements
The following are examples of ‘typical requirements.’ Note that
these specifications are generally found as standard crystal
values and are less expensive than custom values. If crystals are
used in series circuits, load capacitance is not applicable. Load
capacitance of parallel circuits is a requirement. 48 MHz third
overtone crystals require the Cin/Lin filter to guarantee 48 MHz
operation.
12 MHz Crystals:
Cbk
0.01
μF
Cout
22 pF
Cin
22 pF
Lin
2.2
μH
Frequency Tolerance:
Operating Temperature Range:
Frequency:
Frequency Drift over Temperature:
ESR (Series Resistance):
Load Capacitance:
Shunt Capacitance:
Drive Level:
Operating Mode:
48 MHz Crystals:
Frequency Tolerance:
Operating Temperature Range:
Frequency:
Frequency Drift over Temperature:
ESR (Series Resistance):
Load Capacitance:
Shunt Capacitance:
Drive Level:
Operating Mode:
±100 ppm or better
0°C to 70°C
12 MHz
± 50 ppm
60Ω
10 pF min.
7 pF max.
0.1–0.5 mW
fundamental
±100 ppm or better
0°C to 70°C
48 MHz
± 50 ppm
40
Ω
10 pF min.
7 pF max.
0.1–0.5 mW
third overtone
Note
1. CM (Clock Multiply) pin of the SL811HS must be tied to GND when 48 MHz crystal circuit or 48 MHz clock source is used.
Document 38-08008 Rev. *F
Page 4 of 32
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