PBL 402 15
Maximum Ratings
Parameter
Condition
Symbol
Vcc
Vccdiff
Gnddiff
P
max
P
D
T
S
T
LEAD
Min.
Typ.
Max.
5.5
0.6
0.6
10
250
150
300
Unit
V
V
V
dBm
mW
°C
°C
Supply voltage
Voltage applied between two different
supply pins, except VccRF
(a)
Voltage applied between two
Grounds are clamped together
(a)
different ground pins
by diodes
Maximum input power
LNA input
Maximum power dissipation
IC storage temperature
Lead temperature
solder, 10 sec.
(a). Under continous operation and during power-up sequences.
-65
Handling
Every pin withstands the ESD test in accordance with MIL-STD-883 (method 3050) and IEC 68-2.
IFOUT
π/4
PIN switch
÷2
RXIN
-π/4
IFIN
π/4
CAP
+
÷2
+
-π/4
IF Filt
RSSI
RSSI
IR RX
IR IF
TXOUT
TX
PA-GATE
GATE
FM Demod
×2
÷2
+
Slave PLL
IF2
Slice
control
PLL
Modulator
DTX
LD
ƒ-φ
÷R
Control
VTUNE
LD
MOD
CP
REF
D CK ST EN RXEN TXEN SHOLD DSL
DRX
Figure 6. Block diagram.
7
ERICSSON [ ERICSSON ]
