MP8830
Pass Through Mode
1.
2.
3.
AENL, BENL & CENL should be held high during pass-through mode. ADCs and DACs will not work properly during pass-through.
Pass-through mode enable. When CREN is high, pass-through mode between the ADC and DAC ports is enabled. RNW controls the direction
of pass-through operation.
READ not WRITE signal. RNW controls the direction of the pass-through operation when CREN is high, and has no impact when CREN is low.
When RNW is high, data passes from the DAC port to the ADC port. When RNW is low, data passes from the ADC port to the DAC port. Note the
port connections are: CD5; AD0; CD6; AD1;...;CD14; AD9.
CREN
RNW
External circuits must stop
driving CD (5-14) when RNW falls
and CREN is high
t
17
CD
(5-14)
t
13
AD
(0-9)
Chip stops
driving AD (0-9)
t
13
t
17
t
17
External circuits can
start driving CD (5-14)
t
14
t
14
t
17
External circuit can
start driving AD (0-9)
Chip drives AD(0-9)
data from last conversion
Note: external circuits must stop
driving AD(0–9) when CREN falls
CREN
RNW
External circuits must stop
driving CD (5-14) when CREN rises
and RNW is low
CD
(5-14)
t
17
AD
(0-9)
Chip stops
driving AD (0-9)
T
13
T
14
T17
External circuits can
start driving AD(0-9)
External circuits must
stop driving AD (0-9)
Chip drives AD(0-9)
data from last conversion
t
14
t
14
t
17
t
13
t
13
t
17
Chip stops driving CD(5-14)
External circuits can
start driving CD(5-14)
Pass through delay from CD(5-14) to AD(0-9)
Pass through delay from AD(0-9) to CD(5-14)
Pass through set up time
Figure 4. Timing for Pass Through Mode Operation
Rev. 1.00
9
EXAR [ EXAR CORPORATION ]
