SPECIFICATIONS (continued)
VCC = 3.17V to 5.50V for the SP690T/SP80_T, VCC = 3.02V to 5.50V for the SP690S/SP80_S, VCC = 2.72V to 5.50V for the SP690R/SP80_R, VBATT = 3.60V, and
TA = TMIN to TMAX unless otherwise noted. Typical values taken at TAMB = +25OC.
PARAMETERS
MIN.
TYP.
MAX.
UNITS CONDITIONS
SP690T/805T, VCC falling
3.00
3.00
2.85
2.85
2.55
2.55
3.075
3.085
2.925
2.935
2.625
2.635
3.15
3.17
3.00
3.02
2.70
2.72
SP690T/805T, VCC rising
SP690S/805S, VCC falling
SP690S/805S, VCC rising
SP690R/805R, VCC falling
SP690R/805R, VCC rising
V
V
Reset Threshold, VRST
NOTE 8
3.00
3.00
2.88
2.88
2.59
2.59
3.075
3.085
2.925
2.935
2.625
2.635
3.12
3.14
3.00
3.02
2.70
2.72
SP802T/804T, VCC falling
SP802T/804T, VCC rising
SP802S/804S, VCC falling
SP802S/804S, VCC rising
SP802R/804R, VCC falling
SP802R/804R, VCC rising
Reset Timeout Period, tWP
140
200
280
ms
V
RESET, PFO Output Voltage, VOH VCC - 0.3 VCC - 0.15
ISOURCE = 30µA
ISINK = 1.2mA, SP690_/802_ where
VCC = VRST minimum
RESET, PFO Output Voltage, VOL
RESET, PFO Output Voltage, VOL
RESET Output Voltage, VOL
0.06
0.13
0.06
0.30
0.30
0.30
V
V
V
VBATTERY = 0V, VCC = 1.0V, ISINK = 40µA
I
SINK = 1.2mA, SP804_/805_ where
VCC = VRST maximum
RESET Output Leakage Current,
NOTE 11
VBATTERY = 0V, VCC = VRST minimum,
VRESET = 0V or VCC
µA
µA
-1
-1
Output Short to GND Current, IOS
,
180
500
VCC = 3.3V, VOH = 0V
VCC < 3.6V
PFO and RESET
Watchdog Timeout, tWD
WDI Pulse Width
1.12
1
1.60
2.24
s
µs
WDI Input Threshold
VIH
VIL
0.7 x VCC
V
0.3 x VCC
-1
µA
WDI Input Current
PFI Input Threshold
0.01
1
0V < VCC < 5.5V
1.200
1.225
1.25
1.25
1.300
1.275
SP690_/805_, VCC <3.6V, VPFI falling
SP802_/804_, VCC <3.6V, VPFI falling
V
PFI Input Current
-25
0.01
10
25
20
nA
PFI Hysteresis, VPFH
mV
PFI rising, VCC < 3.6V
SP690T/S/R JAN 30-06 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
3