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ML4800 参数 Datasheet PDF下载

ML4800图片预览
型号: ML4800
PDF下载: 下载PDF文件 查看货源
内容描述: 功率因数校正和PWM控制器组合 [Power Factor Correction and PWM Controller Combo]
分类和应用: 功率因数校正控制器
文件页数/大小: 14 页 / 156 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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ML4800
FUNCTIONAL DESCRIPTION
(Continued)
Oscillator (RAMP 1)
The oscillator frequency is determined by the values of R
T
and C
T
, which determine the ramp and off-time of the
oscillator output clock:
f
OSC
=
t
RAMP
1
+
t
DEADTIME
(2)
The dead time of the oscillator is derived from the
following equation:
t
RAMP
=
C
T
×
R
T
×
In
at V
REF
= 7.5V:
.
V
REF
125
.
V
REF
375
sensing resistor or current transformer in the primary of
the output stage, and is thereby representative of the
current flowing in the converter’s output stage. DC I
LIMIT
,
which provides cycle-by-cycle current limiting, is
typically connected to RAMP 2 in such applications. For
voltage-mode operation or certain specialized
applications, RAMP 2 can be connected to a separate RC
timing network to generate a voltage ramp against which
V
DC
will be compared. Under these conditions, the use of
voltage feedforward from the PFC buss can assist in line
regulation accuracy and response. As in current mode
operation, the DC I
LIMIT
input would is used for output
stage overcurrent protection.
No voltage error amplifier is included in the PWM stage of
the ML4800, as this function is generally performed on the
output side of the PWM’s isolation boundary. To facilitate
the design of optocoupler feedback circuitry, an offset has
been built into the PWM’s RAMP 2 input which allows
V
DC
to command a zero percent duty cycle for input
voltages below 1.25V.
PWM Current Limit
The DC I
LIMIT
pin is a direct input to the cycle-by-cycle
current limiter for the PWM section. Should the input
voltage at this pin ever exceed 1V, the output of the PWM
will be disabled until the output flip-flop is reset by the
clock pulse at the start of the next PWM power cycle.
V
IN
OK Comparator
The V
IN
OK comparator monitors the DC output of the
PFC and inhibits the PWM if this voltage on V
FB
is less
than its nominal 2.45V. Once this voltage reaches 2.45V,
which corresponds to the PFC output capacitor being
charged to its rated boost voltage, the soft-start begins.
PWM Control (RAMP 2)
When the PWM section is used in current mode, RAMP 2
is generally used as the sampling point for a voltage
representing the current in the primary of the PWM’s
output transformer, derived either by a current sensing
resistor or a current transformer. In voltage mode, it is the
input for a ramp voltage generated by a second set of
timing components (R
RAMP2
, C
RAMP2
), that will have a
minimum value of zero volts and should have a peak
value of approximately 5V. In voltage mode operation,
feedforward from the PFC output buss is an excellent way
to derive the timing ramp for the PWM stage.
Soft Start
Start-up of the PWM is controlled by the selection of the
external capacitor at SS. A current source of 25µA supplies
the charging current for the capacitor, and start-up of the
PWM begins at 1.25V. Start-up delay can be programmed
by the following equation:
(3)
t
RAMP
=
C
T
×
R
T
×
0.51
The dead time of the oscillator may be determined using:
t
DEADTIME
=
2.5V
×
C
T
=
450
×
C
T
55mA
.
(4)
The dead time is so small (tRAMP >> t
DEADTIME
) that the
operating frequency can typically be approximated by:
f
OSC
=
1
t
RAMP
(5)
EXAMPLE:
For the application circuit shown in the data sheet, with
the oscillator running at:
f
OSC
=
100kHz
=
1
t
RAMP
Solving for R
T
x C
T
yields 1.96 x 10
-4
. Selecting standard
components values, C
T
= 390pF, and R
T
= 51.1kΩ.
The dead time of the oscillator adds to the Maximum
PWM Duty Cycle (it is an input to the Duty Cycle Limiter).
With zero oscillator dead time, the Maximum PWM Duty
Cycle is typically 45%. In many applications, care should
be taken that C
T
not be made so large as to extend the
Maximum Duty Cycle beyond 50%. This can be
accomplished by using a stable 390pF capacitor for C
T
.
PWM SECTION
Pulse Width Modulator
The PWM section of the ML4800 is straightforward, but
there are several points which should be noted. Foremost
among these is its inherent synchronization to the PFC
section of the device, from which it also derives its basic
timing. The PWM is capable of current-mode or voltage
mode operation. In current-mode applications, the PWM
ramp (RAMP 2) is usually derived directly from a current
10
REV. 1.0.2 3/7/2001