ML4800
FUNCTIONAL DESCRIPTION
(Continued)
C
SS
=
t
DELAY
×
25
µ
A
.
125V
(6)
where C
SS
is the required soft start capacitance, and
t
DELAY
is the desired start-up delay.
It is important that the time constant of the PWM soft-start
allow the PFC time to generate sufficient output power for
the PWM section. The PWM start-up delay should be at
least 5ms.
Solving for the minimum value of C
SS
:
C
SS
=
5ms
×
25
µ
A
=
100nF
.
125V
while at the same time delivering 13V nominal gate drive
at the PWM OUT and PFC OUT outputs. If using a Zener
diode for this function, it is important to limit the current
through the Zener to avoid overheating or destroying it.
This can be easily done with a single resistor in series with
the Vcc pin, returned to a bias supply of typically 18V to
20V. The resistor’s value must be chosen to meet the
operating current requirement of the ML4800 itself
(8.5mA, max.) plus the current required by the two gate
driver outputs.
EXAMPLE:
With a V
BIAS
of 20V, a V
CC
of 15V and the ML4800 driving
a total gate charge of 90nC at 100kHz (e.g., 1 IRF840
MOSFET and 2 IRF820 MOSFETs), the gate driver current
required is:
I
GATEDRIVE
=
100kHz
×
90nC
=
9mA
R
BIAS
=
R
BIAS
=
V
BIAS
−
V
CC
I
CC
+
I
G
+
I
z
(6a)
Caution should be exercised when using this minimum
soft start capacitance value because premature charging of
the SS capacitor and activation of the PWM section can
result if V
FB
is in the hysteresis band of the V
IN
OK
comparator at start-up. The magnitude of V
FB
at start-up is
related both to line voltage and nominal PFC output
voltage. Typically, a 1.0µF soft start capacitor will allow
time for V
FB
and PFC out to reach their nominal values
prior to activation of the PWM section at line voltages
between 90Vrms and 265Vrms.
Generating V
CC
The ML4800 is a voltage-fed part. It requires an external
15V,
±10%
(or better) shunt voltage regulator, or some
other V
CC
regulator, to regulate the voltage supplied to the
part at 15V nominal. This allows low power dissipation
(7)
(8)
20V
−
15V
=
250Ω
mA
6mA
+
9mA
+
5
Choose R
BIAS
= 240Ω.
The ML4800 should be locally bypassed with a 1.0µF
ceramic capacitor. In most applications, an electrolytic
capacitor of between 47µF and 220µF is also required
across the part, both for filtering and as part of the start-up
bootstrap circuitry.
L1
+
DC
I1
VIN
SW2
I2
I3
I4
SW1
C1
RL
RAMP
VEAO
REF
U3
+
EA
–
DFF
RAMP
OSC
U4
CLK
+
–
U1
R
Q
D U2
Q
CLK
VSW1
TIME
TIME
Figure 4. Typical Trailing Edge Control Scheme
REV. 1.0.2 3/7/2001
11
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
