FMP1617CCx
CMOS LPRAM
3. Deep Power Down Mode Entry/Exit
tWC
A4
tAS(3)
tWR(4
)
tCW(2
)
/CS
tAW
tBW
/UB, /LB
tWP(1)
/WE
tZZWE
tR
Next
Cycle
tZZmin
/ZZ
Deep Power
down exit
Register
Deep Power
down start
Write(DPD)
Parameter
Description
Min
0
Max
1
Units
us
tZZWE
tR(Deep Power Down Mode only)
tZZmin
ZZ low to Write Enable Low
Operation Recovery Time
Low Power Mode Time
200
10
-
-
us
us
4. Address Information
Partial Array Refresh Mode (A3=0, A4=1)
A2
0
A1,A0
11
Refresh Section
Address
Size
Density
1/4
00000h-3FFFFh
256Kbx16
4Mb
0
X
1
1
10
00
11
10
1/2
Full
1/4
1/2
00000h-7FFFFh
00000h-FFFFFh
C0000h-FFFFFh
80000h-FFFFFh
512Kbx16
1Mbx16
8Mb
16Mb
4Mb
256Kbx16
512Kbx16
8Mb
Reduced Memory Size Mode (A3=1, A4=1)
A2
0
A1,A0
11
Refresh Section
1/4
Address
Size
Density
4Mb
00000h-3FFFFh
256Kbx16
0
1
1
10
11
10
1/2
1/4
1/2
00000h-7FFFFh
C0000h-FFFFFh
80000h-FFFFFh
512Kbx16
256Kbx16
512Kbx16
8Mb
4Mb
8Mb
Revision 0.1
Jun. 2006
11
FIDELIX [ FIDELIX ]
